Intel 631xESB/632xESB I/O Controller Hub - Viglen Download

IntroductionChapter 21, “LPC Interface Bridge Registers (D31:F0)”Provides a detailed description of all registers that reside in the LPC bridge. This bridgeresides at Device 31, Function 0 (D31:F0). This function contains registers for manydifferent units within the Intel ® 631xESB/632xESB I/O Controller Hub including DMA,Timers, Interrupts, Processor Interface, GPIO, Power Management, SystemManagement, and RTC.Chapter 22, “IDE Controller Registers (D31:F1)”Provides a detailed description of all registers that reside in the IDE controller. Thiscontroller resides at Device 31, Function 1 (D31:F1).Chapter 23, “SATA Controller Registers (D31:F2)”Provides a detailed description of all registers that reside in the SATA controller. Thiscontroller resides at Device 31, Function 2 (D31:F2).Chapter 24, “SMBus Controller Registers (D31:F3)”Provides a detailed description of all registers that reside in the SMBus controller. Thiscontroller resides at Device 31, Function 3 (D31:F3).Chapter 25, “LAN Controller and BMC Registers (Bn:F0/F1/F2/F3/F4/F5/F7)”Provides a detailed description of all registers that reside in the Intel ® 631xESB/632xESB I/O Controller Hub’s integrated LAN controller. The integrated LAN controllerresides on the Intel ® 631xESB/632xESB I/O Controller Hub’s external PCI bus(typically Bus 1) at Device 0, Function 0 (Bn:D0:F0).Chapter 26, “High-Precision Event Timer Registers”Provides a detailed description of all registers that reside in the multimedia timermemory mapped register space.1.2 OverviewThe Intel ® 631xESB/632xESB I/O Controller Hub component integrates bridgefunctionality for PCI Express, PCI-X, conventional PCI, LPC, USB, SATA, IDE andSMBus, and dual-Gigabit ethernet MAC components as well as numerous boardmanagement functions. It provides for all system I/O, allowing for simpler systemboard architectures and smaller board areas than if discrete components were used.Thus, the Intel ® 631xESB/632xESB I/O Controller Hub provides extensive I/O support.Functions and capabilities include:• Enterprise South Bridge Interface (ESI) and PCI Express X8 upstream ports toMemory Controller Hub (MCH)• PCI Express* Specification, Revision 1.0a-compliant• PCI Protocol Addendum and PCI Electrical and Mechanical Addendum to the PCILocal Bus Specification, Revision 2.0a-compliant• PCI Local Bus Specification, Revision 2.3-compliant with support for 33 MHz PCIoperations (supports up to seven Req/Gnt pairs)• ACPI power management logic support• Enhanced DMA controller, interrupt controller, and timer functions• Integrated serial ATA host controller with independent DMA operation on six portsand AHCI support• Integrated IDE controller supports Ultra ATA100/66/33• USB host interface with support for eight USB ports; four UHCI host controllers;one EHCI high-speed USB 2.0 Host controller40 Intel ® 631xESB/632xESB I/O Controller Hub Datasheet