Intel Pentium III Processor for the SC242 at 450 MHz to 1.0 GHz

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Electrical Specifications2.4.1 Processor VCC CORE DecouplingRegulator solutions need to provide bulk capacitance with a low Effective Series Resistance (ESR)and keep an interconnect resistance from the regulator (or VRM pins) to the SC242 connector ofless than 0.3 mΩ. This can be accomplished by keeping a maximum distance of 1.0 inches betweenthe regulator output and SC242 connector. The recommended VCC CORE interconnect is a 2.0 inchwide by 1.0 inch long (maximum distance between the SC242 connector and the VRM connector)plane segment with a 1-ounce plating. Bulk decoupling for the large current swings when the partis powering on, or entering/exiting low power states, is provided on the voltage regulation module(VRM). If using Intel’s enabled VRM solutions see developer.intel.com for the specification and alist of qualified vendors. The VCC CORE input should be capable of delivering a recommendedminimum dIcc CORE /dt (defined in Table 8) while maintaining the required tolerances (also definedin Table 8).2.4.2 Processor System Bus AGTL+ DecouplingThe Pentium III processor contains high frequency decoupling capacitance on the processorsubstrate; bulk decoupling must be provided for by the system baseboard for proper AGTL+ busoperation. See AP-906, 100 MHz AGTL+ Layout Guidelines for the Intel ® Pentium ® III Processorand Intel ® 440BX AGPset (Document Number 245086) or the appropriate platform design guide,AP-907, Pentium ® III Processor Power Distribution Guidelines (Document Number 245085), andthe GTL+ buffer specification in the Pentium ® II Processor Developer's Manual (DocumentNumber 243502) for more information.2.5 Processor System Bus Clock and Processor ClockingThe BCLK input directly controls the operating speed of the Pentium III processor system businterface. All Pentium III processor system bus timing parameters are specified with respect to therising edge of the BCLK input. See the P6 Family of Processors Hardware Developer's Manual(Document Number 244001) for further details.2.6 Voltage IdentificationThere are five voltage identification pins on the SC242 connector. These pins can be used tosupport automatic selection of power supply voltages. These pins are not signals, but are either anopen circuit or a short circuit to VSS on the processor. The combination of opens and shorts definesthe voltage required by the processor core. The VID pins are needed to cleanly support voltagespecification variations on current and future Pentium III processors. VID[4:0] are defined inTable 3. A ‘1’ in this table refers to an open pin and a ‘0’ refers to a short to ground. The powersupply must supply the voltage that is requested or disable itself.To ensure a system is ready for current and future Pentium III processors, the range of values inbold in Table 3 should be supported. A smaller range will risk the ability of the system to migrateto a higher performance Pentium III processor and/or maintain compatibility with currentPentium III processors.18 Datasheet
Electrical SpecificationsTable 3.Voltage Identification DefinitionProcessor PinsNotes 1,2VID4 VID3 VID2 VID1 VID0 Vcc CORE0 1 1 1 1 1.300 1 1 1 0 1.350 1 1 0 1 1.400 1 1 0 0 1.450 1 0 1 1 1.500 1 0 1 0 1.550 1 0 0 1 1.60 30 1 0 0 0 1.65 30 0 1 1 1 1.70 30 0 1 1 0 1.75 30 0 1 0 1 1.80 30 0 1 0 0 1.85 30 0 0 1 1 1.90 30 0 0 1 0 1.95 30 0 0 0 1 2.00 30 0 0 0 0 2.05 31 1 1 1 1 No Core1 1 1 1 0 2.11 1 1 0 1 2.21 1 1 0 0 2.31 1 0 1 1 2.41 1 0 1 0 2.51 1 0 0 1 2.61 1 0 0 0 2.71 0 1 1 1 2.81 0 1 1 0 2.91 0 1 0 1 3.01 0 1 0 0 3.11 0 0 1 1 3.21 0 0 1 0 3.31 0 0 0 1 3.41 0 0 0 0 3.5NOTES:1. 0 = Processor pin connected to VSS.2. 1 = Open on processor; may be pulled up to TTL V IH on baseboard.3. To ensure a system is ready for the Pentium III processor, the values in BOLD in Table 3 should besupported.Note that the ‘11111’ (all opens) ID can be used to detect the absence of a processor core in a givenconnector as long as the power supply used does not affect these lines. Detection logic and pull-upsshould not affect VID inputs at the power source (see Section 7.0).The VID pins should be pulled up to a TTL-compatible level with external resistors to the powersource of the regulator only if required by the regulator or external logic monitoring the VID[4:0]signals. The power source chosen must be guaranteed to be stable whenever the supply to theDatasheet 19
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Intel Pentium III Processor for the SC242 at 450 MHz to 1.0 GHz

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