Intel Pentium III Processor for the SC242 at 450 MHz to 1.0 GHz

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Electrical Specifications2.8.2 System Bus Frequency Select Signal (BSEL0)The BSEL[1:0] signals (BSEL0 is also known as 100/66#) are used to select the system busfrequency for the Pentium III processor(s). Table 5 defines the possible combinations of the signalsand the frequency associated with each combination. The frequency is determined by theprocessor(s), and frequency synthesizer. All system bus agents must operate at the same core andsystem bus frequency in a 2-way MP Pentium III processor configuration. In a 2-way MP systemdesign, the BSEL[1:0] signals must be connected to the BSEL[1:0] pins of both processors. ThePentium III processor operates at either a 100 MHz or 133 MHz system bus frequency, but notboth. 66 MHz system bus operation is not supported.For systems that support only a 100 MHz system bus clock, resistors on the processor cartridgewill tie the BSEL1 signal to ground (as shown in Figure 4). This signal can either be left as a noconnect or tied to ground as shown below. The BSEL0 should be pulled up to 3.3 V with a 220 Ωresistor, and provided as a frequency driver to the clock driver/synthesizer.On baseboards which support operation at either 100 or 133 MHz, the BSEL[1:0] signals should bepulled up to 3.3 V with a 220 Ω resistor (as shown in Figure 5 and Figure 6) and BSEL1 isprovided as a frequency selection signal to the clock driver/synthesizer. The BSEL0 signal can alsobe incorporated into system shutdown logic on the baseboard (thus forcing the system to shutdownas long as the BSEL0 signal is low). Figure 4 shows this routing example with a 100 MHzPentium III processor. Figure 5 shows the same routing example with a 133 MHz Pentium IIIprocessor.Table 5.Frequency Select Truth Table for BSEL[1:0]BSEL1 BSEL0 Frequency0 0 66 MHz (unsupported)0 1 100 MHz1 0 Reserved1 1 133 MHzFigure 4. BSEL[1:0] Example for a 100 MHz System Design (100 MHz Processor Installed)Intel ® Pentium ® III Processor220 Ω3.3VCK100100/66#GNDSC2420 Ω 0 ΩBSEL1ProcessorCoreGNDBSEL01 ΚΩ 3.3 ΚΩGND22 Datasheet
Electrical SpecificationsFigure 5. BSEL[1:0] Example for a 100/133 MHz Capable System(100 MHz Processor Installed)3.3V220 ΩCK133220 Ω3.3VSystemShutdownLogic133/100#BSEL1BSEL0SC242Intel ® Pentium ® III Processor0 Ω 0 ΩProcessorCore1 ΚΩ 3.3 ΚΩGNDGNDFigure 6. BSEL[1:0] Example for a 100/133 MHz Capable System(133 MHz Processor Installed)3.3V220 ΩCK133220 Ω3.3VSystemShutdownLogic133/100#BSEL1BSEL0SC242Intel ® Pentium ® III Processor1 ΚΩ 3.3 ΚΩProcessorCore1 ΚΩ 3.3 ΚΩGNDGND2.9 Test Access Port (TAP) ConnectionDue to the voltage levels supported by other components in the Test Access Port (TAP) logic, it isrecommended that the Pentium III processor be first in the TAP chain and followed by any othercomponents within the system. A translation buffer should be used to connect to the rest of thechain unless one of the other components is capable of accepting a 2.5 V input. Similarconsiderations must be made for TCK, TMS, and TRST#. Two copies of each signal may berequired with each driving a different voltage level.The Debug Port should be placed at the start and end of the TAP chain with the TDI of the firstcomponent coming from the Debug Port and the TDO from the last component going to the DebugPort. In a 2-way MP system, be cautious when including an empty SC242 connector in the scanchain. All connectors in the scan chain must have a processor installed to complete the chain or thesystem must support a method to bypass the empty connectors; SC242 terminator substrates shouldnot connect TDI to TDO in order to avoid placing the TDO pull-up resistors in parallel. See SC242Terminator Card Design Guidelines (Document Number 243409) for more details.Datasheet 23
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Page 3 and 4: Contents1.0 Introduction...........
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Intel Pentium III Processor for the SC242 at 450 MHz to 1.0 GHz

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