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Page of GA26-5918-8Revised July 14, 1971By TNL: GN26-0269HexadecimalValueStore Status (STS) (con't)HexadecimalValueBranch or Skip on Condition (BSC or BOSC) (con't)2C80xxxx2CCOxxxx2CC1xxxx2D00xxxx2D40xxxx2D41xxxx2D80xxxx2DC0xxxx2DClxxxx2E00xxxx2E40xxxx2E41xxxx2E80xxxx2ECOxxxx2EClxxxx2F00xxxx2F40xxxx2F41xxxx2F80xxxx2FCOxxxx2FClxxxx30XXStore status of indicators in CSL at EA (V in CSL at Addr)Clear storage protect bit in CSL at EA (V in CSL at Addr)Write storage protect bit in CSL at EA (V in CSL at Addr)Store status of indicators in CSL at EA (Addr+XR1)Clear storage protect bit in CSL at EA (Addr+XR1)Write storage protect bit in CSL at EA (Addr+XR1)Store status of indicators in CSL at EA (V in CSL at -Addr+XR1")Clear storage protect bit in CSL at EA (V in CSL at "Addr+XR1")Write storage protect bit in CSL at EA (V in CSL at "Addr+XR1")Store status of indicators in CSL at EA (Addr+XR2)Clear storage protect bit in CSL at EA (Addr+XR2)Write Storage protect bit in CSL at EA (Addr+XR2)Store status of indicators in CSL at EA (V in CSL at "Addr+XR2")Clear storage protect bit in CSL at EA (V in CSL at "Addr+XR2")Write storage protect bit in CSL at EA (V in CSL at "Addr+XR2")Store status of indicators in CSL at EA (Addr+XR3)Clear storage protect bit in CSL at EA (Addr+XR3)Write storage protect bit in CSL at EA (Addr+XR3)Store status of indicators in CSL at EA (V in CSL at "Addr+XR3")Clear storage protect bit in CSL at EA (V in CSL at "Addr+XR3")Write storage protect bit in CSL at EA (V in CSL at "Addr+XR3")Wait (WAIT)Wait until manual start or until an interrupt occursBranch and Store Instruction Register (BSI)40xx Store next sequential address in CSL at EA (I+DISP) and branchto EA+141xx Store next sequential address in CSL at EA (XR1+DISP) andbranch to EA+142xx Store next sequential address in CSL at EA (XR2+DISP) andbranch to EA+143xx Store next sequential address in CSL at EA (XR3+DISP) andbranch to EA+144* xxxxx If no condition is true, store next sequential address in CSL at EA(IA=0) (Addr) and branch to EA+144 * xxxxx If no condition is true, store next sequential address in CSL at EA(IA-1) (V in CSL at Addr) and branch to EMI45 * xxxxx If no condition is true, store next sequential address in CSL at EA(IA=0) (Addr+XR1) and branch to EA+145* xxxxx If no condition is true, store next sequential address in CSL at EA(IA=1) (V in CSL at "Addr+XR1") and branch to EA+146. xxxxx If no condition is true, store next sequential address in CSL at EA(IA=0) (Addr+XR2) and branch to EA+146* xxxxx If no condition is true, store next sequential address in CSL at EA(IA=1) (V in CSL at "Addr+XR2") and branch to EA+147 * xxxxx If no condition is true, store next sequential address in CSL at EA(IA=0) (Addr+XR3) and branch to EA+147. xxxxx(IA=1)If no condition is true, store next sequential address in CSL at EA(V in CSL at "Addr+XR3") and branch to EA+1Branch or Skip on Condition (BSC or BOSC)48 * x Skip <strong>the</strong> next one-word instruction if any condition is true4C`xxxxx(IA=O)Branch to CSL at EA (Addr) if no condition is true4C * xxxxx(IA=1)4D * xxxxx(IA=0)4D • xxxxx(IA=1)4E • xxxxx(IA=O)4E • xxxxx(IA=1)4F • xxxxx(IA=0)4F • xxxxx(IA-1)60xx61xx62xx63xx6400xxxx6480xxxx6500xxxx6580xxxx6600xxxx6680xxxx6700xxxx6780xxxx68xx69xx6Axx6Bxx6COOxxxx6C80xxxx6D00xxxx6D80xxxx6E00xxxx6E80xxxx6F00xxxx6F80xxxx70xx71xx72xx73xx74xxxxxx7500xxxx7580xxxx7600xxxx7680xxxx7700xxxx7780xxxxBranch to CSL at EA (V in CSL at Addr) if no condition is trueBranch to CSL at EA (Addr+XR1) if no condition is trueBranch to CSL at EA (V in CSL at "Addr+XR1") if no conditionis trueBranch to CSL at EA (Addr+XR2) if no condition is trueBranch to CSL at EA (V in CSL at "Addr+XR2") if no conditionis trueBranch to CSL at EA (Addr+XR3) if no condition is trueBranch to CSL at EA (V in CSL at "Addr+XR3") if no conditionis trueLoad Index (LDX)Load expanded DISP into ILoad expanded DISP into XR1Load expanded DISP into XR2Load expanded DISP into XR3Load Addr into ILoad contents of CSL at Addr into ILoad Addr into XR1Load contents of CSL at Addr into XR1Load Addr into XR2Load contents of CSL at Addr into XR2Load Addr into XR3Load contents of CSL at Addr into XR3Store Index (STX)Store I in CSL at EA (I+DISP)Store XR1 in CSL at EA (1+DISP)Store XR2 in CSL at EA (I+DISP)Store XR3 in CSL at EA (I+DISP)Store I in CSL at EA (Addr)Store I in CSL at EA (V in CSL at Addr)Store XR1 in CSL at EA (Addr)Store XR1 in CSL at EA (V in CSL at Addr)Store XR2 in CSL at EA (Addr)Store XR2 in CSL at EA (V in CSL at Addr)Store XR3 in CSL at EA (Addr)Store XR3 in CSL at EA (V in CSL at Addr)Modify Index and Skip (MDX)Add expanded DISP to I (no skip can occur)Add expanded DISP to XR1Add expanded DISP to XR2Add expanded DISP to XR3Add expanded positive or negative DISP to CSL at Addr(add to core storage)Add addr to XR1Add V in CSL at Addr to XR1Add Addr to XR2Add V in CSL at Addr to XR2Add Addr to XR3Add V in CSL at Addr to XR3117875AB256
HexadecimalValueAdd (A)HexadecimalValueSubtract Double (SD) (con't)80xx81xx82xx83xx8400xxxx8480xxxx8500xxxx8580xxxx8600xxxx8680xxxx8700xxxx8780xxxx88xx89xx8Axx8Bxx8C00xxxx8C80xxxx8D00xxxx8D80xxxx8E00xxxx8E80xxxx8F00xxxx8F80xxxx90xx91xx92xx93xx9400xxxx9480xxxx9500xxxx9580xxxx9600xxxx9680xxxx9700xxxx9780xxxx98xx99xx9Axx9Bxx9C00xxxx9C80xxxxAdd contents of CSL at EA (1+DISP) to AAdd contents of CSL at EA (XR1+DISP) to AAdd contents of CSL at EA (XR2+DISP) to AAdd contents of CSL at EA (XR3+DISP) to AAdd contents of CSL at EA (Addr) to AAdd contents of CSL at EA (V in CSL at Addr) to AAdd contents of CSL at EA (Addr+XR 1) to AAdd contents of CSL at EA (V in CSL at "Addr+XR1") to AAdd contents of CSL at EA (Addr+XR2) to AAdd contents of CSL at EA (V in CSL at "Addr+XR2") to AAdd contents of CSL at EA (Addr+XR3) to AAdd contents of CSL at EA (V in CSL at "Addr+XR3") to AAdd Double (AD)Add contents of CSL at EA (I+DISP) and EA+1 to A and QAdd contents of CSL at EA (XR1+DISP) and EA+1 to A and QAdd contents of CSL at EA (XR2+DISP) and EA+1 to A and QAdd contents of CSL at EA (XR3+DISP) and EA+1 to A and QAdd contents of CSL at EA (Addr) and EA+1 to A and QAdd contents of CSL at EA (V in CSL at Addr) and EA+1 to Aand QAdd contents of CSL at EA (Addr+XR1) and EA+1 to A and QAdd contents of CSL at EA (V in CSL at "Addr+XR1") andEA+1 to A and QAdd contents of CSL at EA (Addr+XR2) and EA+1 to A and QAdd contents of CSL at EA (V in CSL at "Addr+XR2") andEA+1 to A and QAdd contents of CSL at EA (Addr+XR3) and EA+1 to A and CitAdd contents of CSL at EA (V in CSL at "Addr+XR3") andEA+1 to A and QSubtract (S)Subtract contents of CSL at EA (I+DIP) from ASubtract contents of CSL at EA (XR1+DISP) from ASubtract contents of CSL at EA (XR2+DISP) from ASubtract contents of CSL at EA (XR3+DISP) from ASubtract contents of CSL at EA (Addr) from ASubtract contents of CSL at EA (V in CSL at Addr) from ASubtract contents of SCL at EA (Addr+XR1) from ASubtract contents of CSL at EA (V in CSL at "Addr+XR1")from ASubtract contents of CSL at EA (Addr+XR2) from ASubtract contents of CSL at EA (V in CSL at "Addr+XR2")from ASubtract contents of CSL at EA (Addr+XR3) from ASubtract contents of CSL at EA (V in CSL at "Addr+XR3")from ASubtract Double (SD)Subtract contents of CSL at EA (I+DISP) and EA+1 from Aand QSubtract contents of CSL at EA (XR1+DISP) and EA+1 from Aand QSubtract contents of CSL at EA (XR2+DISP) and EA+1 from Aand QSubtract contents of CSL at EA (XR3+DISP) and EA+1 from Aand QSubtract contents of CSL at EA (Addr) and EA+1 from A and QSubtract contents of CSL at EA (V in CSL at Addr) and EA+1from A and Q9D00xxxx9D80xxxx9E00xxxx9EBOxxxx9F00xxxx9F80xxxxAOxxA1xxA2xxA3xxA400xxxxA480xxxxA500xxxxA580xxxxA600xxxxA68OxxxxA700xxxxA780xxxxSubtract contents of CSL at EA (Addr+XR 1) and EA+1 from Aand QSubtract contents of CSL at EA (V in CSL at "Addr+XR1") andEA+1 from A and QSubtract contents of CSL at EA (Addr+XR2) and EA+1 from AAnd QSubtract contents of CSL at EA (V in CSL at "Addr+XR2") andEA+1 from A and QSubtract contents of CSL at EA (Addr+XR3) and EA+1 from Aand QSubtract contents of CSL at EA (V in CSL at "Addr+XR3") andEA+1 from A and CIMultiply (M)Multiply contents of CSL at EA (I+DISP) by AMultiply contents of CSL at EA (XR1+DISP) by AMultiply contents of CSL at EA (XR2+DISP) by AMultiply contents of CSL at EA (XR3+DISP) by AMultiply contents of CSL at EA (Addr) by AMultiply contents of CSL at EA (V in CSL at Addr) by AMultiply contents of CSL at EA (Addr+XR1) by AMultiply contents of CSL at EA (V in CSL at "Addr+XR1") by AMultiply contents of CSL at EA (Addr+XR2) by AMultiply contents of CSL at EA (V in CSL at "Addr+XR2") by AMultiply contents of CSL at EA (Addr+XR3) by AMultiply contents of CSL at EA (V in CSL at "Addr+XR3") by ADivide (D)A8xx Divide A and 0 by contents of CSL at EA (I+DISP)A9xx Divide A and Q by contents of CSL at EA (XR 1+DISP)AAxx Divide A and Q by contents of CSL at EA (XR2+DISP)ABxx Divide A and Q by contents of CSL at EA (XR3+DISP)AC00xxxx Divide A and Q by contents of CSL at EA (Addr)AC80xxxx Divide A and CI by contents of CSL at EA (V in CSL at Addr)ADO0xxxx Divide A and Q by contents of CSL at EA (Addr+XR 1)AD80xxxx Divide A and 0 by contents of CSL at EA (V in CSL at "Addrl-XR1")AE00xxxx Divide A and Q by contents of CSL at EA (Addr+XR2)AE80xxxx Divide A and Q by contents of CSL at EA (V in CSL at "Addr+XR2")AFOOxxxx Divide A and Q by contents of CSL at EA (Addr+XR3)AF80xxxx Divide A and Q by contents of CSL at EA (V in CSL at "Addr+XR3")BOxx131xxB2xxB3xxB400xxxxB480xxxxB500xxxxB580xxxxB600xxxxB680xxxxB700xxxxB780xxxxCompare (CMP)Compare A with contents of CSL at EA (I+DISP)Compare A with contents of CSL at EA (XR1+DISP)Compare A with contents of CSL at EA (XR2+DISP)Compare A with contents of CSL at EA (XR3+DISP)Compare A with contents of CSL at EA (Addr)Compare A with contents of CSL at EA (V in CSL at Addr)Compare A with contents of CSL at EA (Addr+XR1)Compare A with contents of CSL at EA (V in CSL at "Addr+XR1")Compare A with contents of CSL at EA (Addr+XR2)Compare A with contents of CSL at EA (V in CSL at "Addr+XR2")Compare A with contents of CSL at EA (Addr+XR3)Compare A with contents of CSL at EA (V in CSL at "Addr+XR3")17875.2Appendix A. 1800 Instruction Set 257
Page 1 and 2:
File No. 1800-01Order No. GA26-5918
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ContentsINTRODUCTION 1SYSTEM DESCRI
Page 5 and 6:
Thermocouple Conversion ExampleConv
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Status Character 2412790 ADAPTER PR
Page 12:
Processor - ControllerCoreStorageOu
Page 16 and 17:
Page of GA26-5918-8Revised July 14,
Page 18 and 19:
egister or the index register speci
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Short InstructionDDOne WordInstruct
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Instruction SetThe 1800 system inst
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LOAD ACCUMULATOR (LD)FORMATS oitamw
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STORE ACCUMULATOR (STO)FORMATSF 0 O
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LOAD INDEX (LDX)0 OP F T Disp 151 0
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STORE STATUS (STS) Store Status Fun
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LOAD STATUS (LDS)117165 A1DESCRIPTI
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Page 36 and 37:
SUBTRACT DOUBLE (SD).fartzaielTmEas
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DIVIDE (D)FORMATS0 OP F T DispF T I
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LOGICAL EXCLUSIVE OR (EOR)'FORMATS
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SHIFT LEFT A AND Q (SLT)altkae..,.:
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SHIFT RIGHT LOGICAL A (SRA)FORMAT s
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ROTATE RIGHT A AND Q (RTE)FORMAT ta
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BRANCH OR SKIP ON CONDITION (BSC OR
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a4.-4KA4rE4.7.9.4.&.4VA/M4:14/24...
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',V.71..1.41VV4-02,P2A,V4,1%1,L—N
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COMPARE (CMP)FORMATS0 OP F T Disp 1
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Page 60 and 61:
MachineCyclesAUGEND (A-reg) and ADD
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Page 64 and 65:
Page 66 and 67:
chain is accomplished as follows: T
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Page 70 and 71:
Page 72 and 73:
Page 74 and 75:
InterruptTo allow for coordination
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Page 78 and 79:
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After a request for service has bee
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2. The forced BSI with indirect add
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Storage ProtectionStorage protectio
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Page of GA26-5918-8Revised January
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Processor-Controller ConsoleThe pro
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117674,Figure 23. Console Pushbutto
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Page 94 and 95:
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DATA FLOW DISPLAYSSix rows of light
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This command causes the console int
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High -LevelHigh -Level Low-LevelLow
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CUSTOM ELEMENT: This element is ava
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The clock stop period does not dire
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Numberingwithin 18511851's withMult
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selected analog signal to a digital
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Page 114 and 115:
0 1 2 3 4 5 8 7 0 9 10 14 15Indicat
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Direct Program Control Operations P
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Temp TempF C1652° 9001472° 81292
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2. Determine the ADC reading (Q val
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Digital InputDigital input features
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ead operation without external sync
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AdapterFirstSecondThirdFourthFifthS
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the next input group address (conta
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status word (PISW), the PISW is rea
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ProcessorControllerOut Bus(16 - Bit
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DAC reference voltage used in devel
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126 is assigned to the second group
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The input/output control command (I
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Page 142 and 143:
1053/1816 Printer IOCC'sCE ModeSpec
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Keyboard entries are not printed au
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error is detected, the program may
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the keyboard into a storage-protect
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Channel••• ••••• 14
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READER ANY ERROR: This indicator tu
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Even-Numbered ColumnsOdd-Numbered C
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1442 DSW Interrupt IndicatorsFigure
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The preceding examples show that if
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CharHexCore Storage BitsTypebar2 5
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CE PRINTER BUSY: When the 1443 is i
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DrumDownDRUM FAST RUN: This switch
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1627 DSW Noninterrupt IndicatorsFig
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120255A1Each track is divided into
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This command places the disk storag
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ANY ERROR: This indicator turns on
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LogicalDataRecordIBGapLRCIBGap.._01
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A tape mark read from seven-track t
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Modifier bits perform the five func
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an XIO initialize read operation wi
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Communications AdapterINTRODUCTIONT
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character (bit positions 0 through
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Bit PositionsP, 7, 6, 54, 3, 2, 100
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Standard replies as well as NAK cau
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either seeking characters received
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CA IOCC'sInitialize Write0 15 0 4 8
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TIMEOUT: This indicator turns on, c
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0 I 2 3 4 5 6 7 8 9 10 11 i2 13 14
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ETB, ETX, AND ENQ: These characters
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.■••.0■-3toCOc.nroz0F21.0fa
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Selector ChannelThe selector channe
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CCW Word 1 CCW Word 2 CCW Word 315B
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limited to the number of sense byte
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CSW Word 1 CSW Word 2 CSW Word 3 CS
Page 216 and 217: CSW Word 2 CSW Word 3CSW Word 40 3
Page 218 and 219: Termination of an operation with a
Page 220 and 221: Device end, when subsequently provi
Page 222 and 223: System /360 AdapterINTRODUCTIONThe
Page 224 and 225: specified by the channel command wo
Page 226 and 227: ATTENTION: This status indicates th
Page 228 and 229: Page of GA26-5918-8Revised July 14,
Page 230 and 231: HALT: This bit turns on, causing an
Page 234 and 235: Start Byte AS Address Byte Device A
Page 238 and 239: Read data request causes the adapte
Page 240 and 241: If a 1053 Printer is addressed by t
Page 242 and 243: specific 16-word block within the c
Page 244 and 245: LCCBWord1Address Word(Active Frame)
Page 246 and 247: channel active is interrogated. If
Page 248 and 249: Form GA26-5918-8Page Revised 10/1/7
Page 250 and 251: AREA STATION LOCAL I/O TRANSACTION
Page 254 and 255: 244Form GA26-5918-8Page Added 10/1/
Page 262 and 263: When all segments are bypassed modi
Page 264 and 265: 0. It can occur only during a read
Page 268 and 269: HexadecimalValueDouble Compare (DCM
Page 270 and 271: Appendix B. I/O Device AddressingTh
Page 272 and 273: 1054 AND 1055 PAPER TAPEWRITE: Punc
Page 274 and 275: INITIALIZE WRITE: Move contents of
Page 276 and 277: INITIALIZE READ: Move tape data to
Page 278 and 279: AREA FEATURE 0 1 2 3 4 5 6 7 8 9•
Page 284 and 285: Clear (Continued)Storage (Continued
Page 286 and 287: Converting Thermocouple Characteris
Page 290 and 291: 4Input/Output Control (Continued)On
Page 292 and 293: Loop Channel (Continued)Control Blo
Page 294 and 295: Pulse OutputDescription of 125Timer
Page 296 and 297: Storage ProtectBit (S) 10Bit Light
Page 298 and 299: 1053 Printer (Continued)Maximum Rat
Page 300 and 301: 1810 Disk Storage (Continued)Read/W
Page 302: Form GA26-5918-8Page Revised 10/1/7
Page 305: IBM Technical Newsletter File Numbe
Page 308 and 309: ^;``
Page 311 and 312: • READER'S COMMENT FORM•▪ IBM
Page 313 and 314: • READER'S COMMENT FORM• IBM 18
Page 315 and 316: • READER'S COMMENT FORM• IBM 18
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