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Systems Reference Library - All about the IBM 1130 Computing ...

Systems Reference Library - All about the IBM 1130 Computing ...

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Processor-Controller ConsoleThe processor-controller (P-C) console (Figure 22)provides <strong>the</strong> means for manual control of <strong>the</strong> P-Cduring debugging or operating phases.The basic operating features and controls provide<strong>the</strong> facility to:1. Start or stop instruction execution.2. Address core storage.3. Set up and store data or instructions.4. Communicate with <strong>the</strong> program via sense orprogram select switches.5. Control <strong>the</strong> cycling rate in <strong>the</strong> run, single storagecycle, single instruction, or single stepmodes.6. Interrupt <strong>the</strong> program manually.7. Trace each instruction.8. Reset all control circuitry and storage.9. Turn power on and off.10. Indicate basic machine conditions and status.11. Display storage words and register data.12. Write or clear storage protect bits.13. Clear core storage.PUSHBUTTON SWITCHES AND LIGHTSThere are two rows of pushbutton switches andlights. One row is at <strong>the</strong> top of <strong>the</strong> console (Figure23); ano<strong>the</strong>r is at <strong>the</strong> bottom (Figure 24). The followingparagraphs describe <strong>the</strong> functions of <strong>the</strong>seswitches and lights.Clear StorageThis switch (CLEAR STOR) has four functions, describedin Figure 25. As <strong>the</strong> figure indicates, <strong>the</strong>desired function is selected by setting <strong>the</strong> modeswitch and <strong>the</strong> write storage protect bits (WSPB)switch to <strong>the</strong> appropriate positions. The functionthus selected can <strong>the</strong>n be executed by holding downCLEAR STOR while pressing START.The P-C cycles completely through all corestorage addresses during <strong>the</strong> execution of each clearstorage function.Program LoadThe program load switch (PROG LOAD) is used toload <strong>the</strong> first 1442 card or 1054 tape record into corestorage. This first card or tape record must containinstructions that initiate <strong>the</strong> loading of <strong>the</strong> remainingcards or tape records. (The P-C must be inrun mode for program operation.) It should be notedthat a program load operation does not alter <strong>the</strong>status of <strong>the</strong> interrupt mask register.The first card or tape record is read into corestorage, beginning at <strong>the</strong> location specified by <strong>the</strong> I-register.. Normally, RESET is pressed beforepressing PROG LOAD. This resets <strong>the</strong> I-register to/0000. After RESET is pressed, <strong>the</strong> I-register maybe manually altered to some address o<strong>the</strong>r than/0000. This allows <strong>the</strong> first card or tape record tobe placed at any location in core storage.In any case, upon completion of <strong>the</strong> transfer of<strong>the</strong> first card or tape record to core storage, <strong>the</strong>P-C automatically branches to location /0000 tobegin instruction execution. Therefore, location/0000 should contain a valid instruction.Only one input device can be used for initialprogram load (IPL). The first 1442 on <strong>the</strong> system isused for IPL. The 1054 is used for IPL when <strong>the</strong>reis no 1442 on <strong>the</strong> system.When <strong>the</strong> 1442 is used for IPL, it operates inpacked mode. The first card is read into 40 ascendingcore storage addresses beginning with <strong>the</strong> addressspecified by <strong>the</strong> I-register. The binary datafrom two card columns is stored in each core storagelocation. For example, binary data from cardcolumn 1 (rows 12 through 5) is read into core storagelocation /0000 (bit positions 8 through 15), andbinary data from card column 2 (rows 12 through 5)is read into <strong>the</strong> same core storage location (bitpositions 0 through 7). Card rows 6 through 9are not read into core storage. The remainderof <strong>the</strong> first card is read in <strong>the</strong> same manner,entering all odd numbered card columns in bitpositions 8 through 15 of <strong>the</strong>ir respective corestorage locations, and even numbered card columnsin bit positions 0 through 7 or <strong>the</strong>ir respectivecore storage locations.80

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