z/OS V1R9.0 UNIX System Services Command ... - Christian Grothoff

make
Makefiles
A makefile is a text file that describes the dependencies between various files. It
normally contains a list of targets and identifies the prerequisites on which each
depends. It also contains a series of instructions, called recipes, which describe the
actions to be taken if a given target is out of date with its prerequisites.
By default, if you do not specify the –f option, make looks for a file in your current
directory named makefile. If it does not find this file, it searches your current
directory for a file named Makefile. If make finds either file, it uses this file as your
makefile.
You can change the default makefiles with the .MAKEFILES special target. This target
is already specified in the startup.mk file. See “Special Target Directives” on page
404 for more information.
Macro Definitions
Macro definitions can appear on the command line or in makefiles. Macro
definitions on the command line overrule definitions in makefiles; makefile
definitions never overrule command-line definitions. Macro definitions on the
command line may not have any white space between the macro name and the =
character.
Macro definitions may take several forms.
macro = string
is the usual form. If string contains macro references, make does not expand them
when the macro is defined, but when the macro itself is expanded.
macro := string
expands macros inside string before assigning a value to macro.
macro += string
adds string to the previous value of macro.
You can use any amount of white space on both sides of macro operators. make
defines the name macro to have the value string and replaces it with that value
whenever it is used as $(macro) or ${macro} within the makefile. It is possible to
specify a $(macro_name) or ${macro_name} macro expansion, where
macro_name contains more $(....) or ${...} macro expansions itself.
Normally, make does not include white space at the beginning and end of string in
the definition of macro; however, it never strips white space from macros imported
from the environment.
If you want to include white space in a macro definition specified on the make
command line, you must enclose the definition in quotes.
make resolves macro definitions in the following order:
1. Macro definitions in the built-in rules
2. Macro definitions on the command line associated with the –D option
3. Macro definitions in the startup file
4. Contents of the environment
5. Macro definitions in the makefiles (in the order they appear)
6. Macro definitions on the command line without the –D option
394 z/OS V1R9.0 UNIX System Services Command Reference