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Introduction to Microcontrollers Lab Manual - Microchip

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FIGURE 2-2: LAB 2 PRIMARY AND ALTERNATE INTERRUPT VECTOR TABLE<br />

Note: A device Reset is not a true exception because the interrupt controller is not<br />

involved in the Reset process. The PIC24F device clears its registers in response <strong>to</strong> a<br />

Reset, which forces the PC <strong>to</strong> zero. The processor then begins program execution at<br />

location 0x000000.<br />

When a UART1 Receiver interrupt occurs, the processor s<strong>to</strong>res its current state on the<br />

software stack and then jumps <strong>to</strong> the address s<strong>to</strong>red in the vec<strong>to</strong>r table for that interrupt.<br />

For the PIC24FJ256GB110, the UART1 Receiver uses interrupt 11, Interrupt Vec<strong>to</strong>r<br />

Table Address 0x00002A.<br />

The processor would therefore branch <strong>to</strong> and execute the code located at the address<br />

s<strong>to</strong>red at 0x00002A when a UART1 Receiver interrupt occurs.<br />

Refer <strong>to</strong> the <strong>Microchip</strong> “PIC24FJ256GB110 Family Data Sheet” (DS39897) for a complete<br />

list of “implemented interrupt vec<strong>to</strong>rs”.<br />

Setting up interrupts in assembly for the PIC24FJ256GB110 is actually quite easy.<br />

MPLAB IDE does a lot of the overhead work and each interrupt has a predefined label.<br />

Table 2-1 lists some of these predefined labels.<br />

2011 <strong>Microchip</strong> Technology Inc. DS51963A-page 21

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