LOGIC DESIGN LABORATORY MANUAL - VTU e-Learning Centre

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Logic Design Laboratory Manual 47 ___________________________________________________________________________ <strong>DESIGN</strong> 2: Sequence = 1001011 Sequence length S = 7 Y = Q B (+) Q C Y 3 VCC 14 1 Serial Input QA 13 12 11 2 A 2 1 QB 3 IC 7495 B QC 4 INPUTS C QD 10 CLK 8 5 6 7 D 9 Mode Control Gnd Q A Q B Q C Q D Y 1 1 1 1 0 0 1 1 1 0 0 0 1 1 1 1 0 0 1 0 0 1 0 0 1 1 0 1 0 1 1 1 0 1 1 1 1 0 1 1 1 X X 1 X 0 X 0 X X 1 X 0 X 1 X 1 <strong>DESIGN</strong> 3: Sequence = 1101011 Sequence length S = 7 Y = Q A + Q C + Q D X X X X X 1 1 X X 1 0 1 X X 0 1 VCC QA QB QC QD CLK 1 2 13 12 Y Q A Q B Q C Q D Y 1 1 1 1 1 14 13 12 11 10 9 8 1 1 1 1 0 0 1 1 1 1 IC 7495 1 0 1 1 0 0 1 0 1 1 1 2 3 4 5 6 7 1 0 1 0 1 1 1 0 1 1 Serial Input A B INPUTS C D Mode Gnd Control 1 1 0 1 1 1
Logic Design Laboratory Manual 48 ___________________________________________________________________________ VIVA QUESTIONS: 1) What is the necessity for sequence generation? 2) What are PISO, SIPO, and SISO with respect to shift register? 3) Differentiate between serial data & parallel data 4) What is the significance of Mode control bit? 5) What is a ring counter? 6) What is a Johnson counter? 7) How many Flip-flops are present in IC 7495?
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