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LOGIC DESIGN LABORATORY MANUAL - VTU e-Learning Centre

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Logic Design Laboratory Manual 8<br />

___________________________________________________________________________<br />

ii) NAND GATES<br />

III.<br />

HALF SUBTRACTOR<br />

TRUTH TABLE<br />

INPUTS OUTPUTS<br />

A B D Br<br />

0 0 0 0<br />

0 1 1 1<br />

1 0 1 0<br />

1 1 0 0<br />

BOOLEAN EXPRESSIONS:<br />

D = A ⊕ B<br />

Br =<br />

A _<br />

B

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