Synchronous Latency Insensitive Design - ICS
Synchronous Latency Insensitive Design - ICS
Synchronous Latency Insensitive Design - ICS
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Multiple clocks<br />
Can a multiple clock system be synchronous?<br />
Example – rationally related clocks<br />
f c1<br />
f c2 =(2/3)f c1<br />
f=<br />
<strong>Synchronous</strong> to f c1<br />
Christer Svensson, ASYNC 2004 32