Synchronous Latency Insensitive Design - ICS

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Overview of wire properties Skin effect loss Higher frequencies - skineffekt Fields penetrate metal to skin-depth δ Resistance per unit length, r: r = r s ω Including current phase and low frequency resistance: Current flow, depth δ, (skin depth) r = rDC + rs 1+ ( j) ω Frequency dependence (dispersion) gives rise to signal distortion Christer Svensson, ASYNC 2004 6
Overview of wire properties We discuss 2 wire properties in the following Delay (<strong>Latency</strong>) Capacity (Maximum data rate) Christer Svensson, ASYNC 2004 7
Page 1 and 2: Synchronous Latency Insensitive Des
Page 3 and 4: Introduction The wire delay problem
Page 5: Overview of wire properties Ground
Page 9 and 10: Overview of wire properties Capacit
Page 11 and 12: Overview of wire properties Note th
Page 13 and 14: Overview of wire properties Low lev
Page 15 and 16: Overview of wire properties On-chip
Page 17 and 18: Overview of wire properties Upper w
Page 19 and 20: Architectural view of future system
Page 33 and 34: Multiple clocks FIFO synchronizatio
Page 35: References F. Anceau, "A Synchronou

Synchronous Latency Insensitive Design - ICS

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