Burn-in & Test Socket Workshop - BiTS Workshop

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COPYRIGHT NOTICE • The papers in this publication comprise the proceedings of the 2002 BiTS Workshop. They reflect the authors’ opinions and are reproduced as presented , without change. Their inclusion in this publication does not constitute an endorsement by the BiTS Workshop, the sponsors, or the Institute of Electrical and Electronic Engineers, Inc. · There is NO copyright protection claimed by this publication. However, each presentation is the work of the authors and their respective companies: as such, proper acknowledgement should be made to the appropriate source. Any questions regarding the use of any materials presented should be directed to the author/s or their companies.
Burn-in & Test Socket Workshop Technical Program Session 7 Wednesday 3/06/02 8:00AM Burn-in Board Design “Burn-in Board Over-current Protection – What Are The Options?” KW Low - Intel Corporation Zamel Jaafar - Intel Corporation “Protecting Conductor Pads On Burn-in Boards From Oxidation And Corrosion” Alfred Sugarman - Loranger International Corporation Al Loranger - Loranger International Corporation “Power Decoupling Optimizer – A Systematic Frequency Domain Approach To BiB Noise Decoupling Simulation” Isaac Chang - Intel Corporation
Page 1: Burn-in & Test Socket Workshop IEEE
Page 5 and 6: Agenda • Introduction • UUT Swi
Page 7 and 8: UUT Switching Characteristics(1) Po
Page 9 and 10: UUT Switching Characteristics(.3) T
Page 11 and 12: BIB Over-current Protective Device
Page 13 and 14: Solutions Investigated • Polymer-
Page 15 and 16: Conclusion • Burn-in board is des
Page 17 and 18: PROTECTING CONDUCTOR PADS ON BURN-I
Page 19 and 20: PROCEDURE • Printed circuit assem
Page 21 and 22: Figure 1. Typical MAP6 board on whi
Page 23 and 24: Contact Resistance For Solder Coate
Page 25 and 26: Resistance Change, Ohms Contact Res
Page 27 and 28: TABLE 1. NUMBER OF OPEN CONTACTS AF
Page 29 and 30: Figure 5. 300 µin thick solder pla
Page 31 and 32: Gold Coating Thickness Requirement
Page 33 and 34: Discussion (continued) • Conducto
Page 35 and 36: CONCLUSIONS • Gold coated conduct
Page 37 and 38: Agenda - Understand BIB Power Decou
Page 39 and 40: Introduction • Existing Time Doma
Page 41 and 42: New PD Optimization(PDO) BKM Start
Page 43 and 44: Ztarget Definition & Relationship W
Page 45 and 46: Cres Effect in Optimization Z (Ω)
Page 47 and 48: PDO - Clocal Optimization Steps Fai
Page 49 and 50: Impedance(mΩ) 4x 3x 2x Example: BI
Page 51 and 52: Conclusion • PDO is a more system

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