cmd6686gx manual - RTD Embedded Technologies, Inc.

Watchdog Timer Control
The cpuModule includes a Watchdog Timer, which provides protection against programs "hanging",
or getting stuck in an execution loop where they cannot respond correctly. When enabled, the
Watchdog Timer must be periodically reset by your application program. If it is not reset before the
time-out period of 1.2 seconds expires, it will cause a hardware reset of the cpuModule.
Three functions have been implemented on the cpuModule for Watchdog Timer control. These are:
• Watchdog Timer enable
• Watchdog Timer disable
• Watchdog Timer reset
To enable the watchdog timer you must write a 1 to to Bit 0 of I/O register 1Eh. To ensure compatability
with future designs, you should read the register and only change the bit you need to change.
After you enable the watchdog timer, you must reset it at least once every 1.2 seconds by reading I/
O 1Eh. The data read does not matter.
To disable the watchdog timer you must write a 0 to to Bit 0 of I/O register 1Eh.
Enabling the watchdog timer is illustrated in the following QuickBasic program fragment:
temp = INP(&H1E)
’Read I/O port 1Eh
temp = temp OR 1 ’Set LSB to 1
OUTPUT &H1E, temp ’Enable WDT
When the watchdog timer is enabled it must be refreshed before it times out or it hardware reset the
system. Refreshing the watchdog timer is illustrated in the following QuickBasic program fragment:
temp = INP(&H1E)
’Read I/O port 1Eh to refresh the WDT
Disabling the watchdog timer is illustrated in the following QuickBasic program fragment:
temp = INP(&H1E)
’Read I/O port 1Eh
temp = temp AND &HFE ’Clear LSB to 0
OUTPUT &H1E, temp ’Disable WDT
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