Lecture Notes for Computer Architecture II - St. Cloud State University

Lecture 24 Processor Design - Data path for Beq instructions
Example :
Design DP for branch instruction
PC+4
beq $1 $2 offset 4 1 2 pc+4+offset
branch target
branch
compare relative to branch inst target address
address
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- need to compare
- need to compute branch target address
Adder
Should do 2 things
- condition true
1 0
- go to branch target address control sg
MUX
- condition false
- next inst to Program counter
- also need a word offset
shift offset field 2 bits left
beq $1 $2 offset
ALU OP
5bit Read 5 bit 16 bit offset
Reg 2 Read Reg 1
Reg file
Read Read 32 bit
Data 2 Data 1
SL-2
ALU
zero
Sign
extension
Adder
Branch PC + 4
0 1
MUX
to PC
PC + 4