Lecture Notes for Computer Architecture II - St. Cloud State University

Alu controller design
Single cycle
Implemented using combinational logic - no flipflops
Truthtable logic equation draw circuit
Inputs
-2 bits from main controller
aluop1, aluop2
Page | 154
-function field 0~5 bits
Outputs
5 low level instructions to represent 10 MIPS instructions
Add represented by 010
Sub - 110
And - 000
Or - 001
Set less than - 111
From main controller
input 0~5 bitsFunction field ALUOP2
ALUOP1
ALU controller
ALU controller
or
ALU
outputs
Inputs
Alu Alu F 5 F 4 F 3 F 2 F 1 F 0 Designed ALU
Action
OP1 OP0 X Y Z
0) 1w 0 0 X X X X X X 0 1 0 Add
1) sw 0 0 X X X X X X 0 1 0 Add
2) beq 0 1 X X X X X X 1 1 0 Sub
3)add R-type 1 0 1 0 0 0 0 0 0 1 0 Add
4) Sub 1 0 1 0 0 0 1 0 1 1 0 Sub
5) AND 1 0 1 0 0 1 0 0 0 0 0 AND
6) OR 1 0 1 0 0 1 0 1 0 0 1 OR
7) Slt 1 0 1 0 1 0 1 0 1 1 1 Slt
Logic equations -- -- -- -- -- -- -- -- -- --
X = 2 + 4 + 7 = op1.op0 + op1.op0.F5.F4.F3.F2.F1.F0 + op1.op0.F5.F4.F3.F2.F1.F0
Y = 0 + 1+ 2 + 3 + 4 + 7
Z = 6 + 7