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Lecture Notes for Computer Architecture II - St. Cloud State University

Lecture Notes for Computer Architecture II - St. Cloud State University

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Direct Mapping<br />

Each main memory block has one specific location in the cache<br />

Block j of the main memory maps onto block (J modulo cache size)<br />

Example<br />

Cache size 128<br />

Block 0, 128, 256, … mapped one at a time to cache block 0.<br />

Page | 228<br />

Direct Mapped Cache<br />

Memory address divided into 3 fields<br />

Tag,<br />

block<br />

word<br />

Tag represents the higher order bits of the memory address<br />

Match the tags in the memory address and cache address to determine whether<br />

the block is in cache<br />

Block field determines the cache position<br />

Word field determines the number of words in a block<br />

Example<br />

Word field 4 16 words in a block<br />

Word field 2 4 words in a block<br />

Direct Mapped Cache<br />

• Taking advantage of spatial locality:<br />

Hits vs. Misses<br />

• Read hits<br />

– this is what we want!<br />

• Read misses<br />

– stall the CPU, fetch block from memory, deliver to cache, restart<br />

• Write hits:<br />

– can replace data in cache and memory (write-through)<br />

– write the data only into the cache (write-back the cache later)<br />

• Write misses:<br />

– read the entire block into the cache, then write the word

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