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Chapter 6 – Section 1 (5/2/04) Page 6.1-2 Ideal Op Amp Symbol: i 1 V DD + + + i 2 v - v i 1 - + + v OUT = A v (v 1 -v 2 ) v 2 - - V SS - Fig. 110-02 Null port: If the differential gain of the op amp is large enough then input terminal pair becomes a null port. A null port is a pair of terminals where the voltage is zero and the current is zero. I.e., v 1 - v 2 = v i = 0 and i 1 = 0 and i 2 = 0 Therefore, ideal op amps can be analyzed by assuming the differential input voltage is zero and that no current flows into or out of the differential inputs. CMOS Analog Circuit Design © P.E. Allen - 2004 Chapter 6 – Section 1 (5/2/04) Page 6.1-3 General Configuration of the Op Amp as a Voltage Amplifier R 1 - R2 + + v + inn v inp v 2 v 1 - - Noniverting voltage amplifier: ⎛R ⎜ 1 +R 2 ⎞ ⎟ v inn = 0 ⇒ v out = ⎜ ⎟ ⎝ R 1 v ⎠ inp Inverting voltage amplifier: v inp = 0 ⇒ v out = - R ⎜⎛ 2 ⎜ ⎝ R 1 ⎠ ⎟⎟⎞ v inn + vout - Fig. 110-03 CMOS Analog Circuit Design © P.E. Allen - 2004
Chapter 6 – Section 1 (5/2/04) Page 6.1-4 Example 6.1-1 - Simplified Analysis of an Op Amp Circuit The circuit shown below is an inverting voltage amplifier using an op amp. Find the voltage transfer function, v out /v in . R 1 i 1 i 2 R 2 i i - + + + v in + v i v out - - - Virtual Ground Fig. 110-04 Solution If A v → ∞, then v i → 0 because of the negative feedback path through R 2 . (The op amp with –fb. makes its input terminal voltages equal.) v i = 0 and i i = 0 Note that the null port becomes the familiar virtual ground if one of the op amp input terminals is on ground. If this is the case, then we can write that i 1 = v in R 1 and i 2 = v out R 2 v out Since, i i = 0, then i 1 + i 2 = 0 giving the desired result as v in = - R 2 R 1 . CMOS Analog Circuit Design © P.E. Allen - 2004 Chapter 6 – Section 1 (5/2/04) Page 6.1-5 Linear and Static Characterization of the Op Amp A model for a nonideal op amp that includes some of the linear, static nonidealities: v 1 CMRR v 2 v 1 - + R icm I B2 e n 2 V OS * i n 2 C id R id R out vout R icm I B1 Ideal Op Amp where R id = differential input resistance C id = differential input capacitance R icm = common mode input resistance V OS = input-offset voltage I B1 and I B2 = differential input-bias currents I OS = input-offset current (I OS = I B1 -I B2 ) CMRR = common-mode rejection ratio e 2 n = voltage-noise spectral density (mean-square volts/Hertz) i 2 n = current-noise spectral density (mean-square amps/Hertz) Fig. 110-05 CMOS Analog Circuit Design © P.E. Allen - 2004
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