Experiment Proposal - opera - Infn

Another solution could be the PVIC bus for the communication between the readout interface and
the processor. This bus (PCI to PCI) could be useful for our application. It has a large bandwidth
(120 Mbyte/s) and allows transparent Direct Memory Access (DMA) to a remote memory. Each readout
interface processor can write on a processor farm memory without disturbing the chosen processor. All
the power is kept and dedicated to the processing and not to data transmission.
The event dispatching to the different processors in the farm uses data blocks defined as a Processing
Time Partition (PTP). Each readout interface builds as many blocks as associated processors in the farm
and sends them sequencially (Fig. 72). An overlap between blocks avoids the problem of an event to
be cut at the end of one block. The overlap should be at least equal to the maximum event duration
(∼ 300 ns).
An offline analysis establishes the correlation between the selected events and the accelerator beam
cycles. At Gran Sasso and CERN, a GPS provides the absolute time with an accuracy of ∼ 20 ns.
The proton beam for the CNGS is extracted from the SPS in a fast mode, with bunch length of
10 µs. With the GPS accuracy it is then possible to reject offline background events occurring between
bunches. Commercial products can be used for the GPS receivers. A GPS device and an optical fibre
link to an external antenna are already installed in the Gran Sasso hall.
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