Intel 80310 I/O Processor Chipset AAU Coding Techniques
Intel 80310 I/O Processor Chipset AAU Coding Techniques
Intel 80310 I/O Processor Chipset AAU Coding Techniques
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<strong>Intel</strong> ® <strong>80310</strong> I/O <strong>Processor</strong> <strong>Chipset</strong> <strong>AAU</strong> <strong>Coding</strong> <strong>Techniques</strong><strong>AAU</strong> Source Code3031 #define <strong>AAU</strong>_USER_MASK(<strong>AAU</strong>_NOTIFY | <strong>AAU</strong>_INCOMPLETE | \32 <strong>AAU</strong>_HOLD | <strong>AAU</strong>_COMPLETE)3334 #define DESC_HEAD 0x001035 #define DESC_TAIL 0x00203637 /* result writeback */38 #define <strong>AAU</strong>_DCR_WRITE 0x8000000039 /* source block extension */40 #define <strong>AAU</strong>_DCR_BLK_EXT 0x0200000041 #define <strong>AAU</strong>_DCR_BLKCTRL_8_XOR 0x0040000042 #define <strong>AAU</strong>_DCR_BLKCTRL_7_XOR 0x0008000043 #define <strong>AAU</strong>_DCR_BLKCTRL_6_XOR 0x0001000044 #define <strong>AAU</strong>_DCR_BLKCTRL_5_XOR 0x0000200045 #define <strong>AAU</strong>_DCR_BLKCTRL_4_XOR 0x0000040046 #define <strong>AAU</strong>_DCR_BLKCTRL_3_XOR 0x0000008047 #define <strong>AAU</strong>_DCR_BLKCTRL_2_XOR 0x0000001048 #define <strong>AAU</strong>_DCR_BLKCTRL_1_XOR 0x0000000249 /* first block direct fill instead of XOR to buffer */50 #define <strong>AAU</strong>_DCR_BLKCTRL_1_DF 0x0000000E51 /* interrupt enable */52 #define <strong>AAU</strong>_DCR_IE 0x000000015354 #define DCR_BLKCTRL_OFFSET 3555657 /* <strong>AAU</strong> callback */58 typedef void (*aau_callback_t) (void *buf_id);5960 /* hardware descriptor */61 typedef struct _aau_desc62 {63 u32 NDA; /* next descriptor address */White Paper 33
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