Intel 80310 I/O Processor Chipset AAU Coding Techniques
Intel 80310 I/O Processor Chipset AAU Coding Techniques
Intel 80310 I/O Processor Chipset AAU Coding Techniques
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<strong>Intel</strong> ® <strong>80310</strong> I/O <strong>Processor</strong> <strong>Chipset</strong> <strong>AAU</strong> <strong>Coding</strong> <strong>Techniques</strong>MMU Functions for <strong>Intel</strong> ® XScale Microarchitecturemcr p15, 0, ip, c7, c10, 4@ Drain Write (& Fill) Buffermov pc, lr.ltorgcpu_manu_name:.asciz"<strong>Intel</strong>"cpu_80200_name:.asciz"XScale-80200"cpu_cotulla_name:.asciz"XScale-Cotulla".align.section ".text.init", #alloc, #execinstr__xscale_setup:mov r0, #F_BIT|I_BIT|SVC_MODEmsr cpsr_c, r0mcr p15, 0, ip, c7, c7, 0@ invalidate I, D caches & BTBmcr p15, 0, ip, c7, c10, 4@ Drain Write (& Fill) Buffermcr p15, 0, ip, c8, c7, 0@ invalidate I, D TLBsmcr p15, 0, r4, c2, c0, 0@ load page table pointermov r0, #0x1f@ Domains 0, 1 = clientmcr p15, 0, r0, c3, c0, 0@ load domain access registermrc p15, 0, r0, c1, c0, 0@ get control registerbic r0, r0, #0x0200@ ......R.........bic r0, r0, #0x0082@ ........B.....A.orr r0, r0, #0x0005@ .............C.Morr r0, r0, #0x3900@ ..VIZ..S........mov pc, lr94 White Paper
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