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TRS Star CompactFlash Card Industrial-Grade Datasheet

TRS Star CompactFlash Card Industrial-Grade Datasheet

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<strong>Industrial</strong>-<strong>Grade</strong> <strong>CompactFlash</strong> <strong>Card</strong><strong>TRS</strong> <strong>Star</strong> SpecificationFor more information visit us under:http://www.trs-star.comSignal Name Dir. Description-IORD(PC <strong>Card</strong> Memory Mode)-IORD(PC <strong>Card</strong> I/O Mode)-IORD(True IDE Mode)-IOWR(PC <strong>Card</strong> Memory Mode)-IOWR(PC <strong>Card</strong> I/O Mode)-IOWR(True IDE Mode)-OE(PC <strong>Card</strong> Memory Mode)-OE(PC <strong>Card</strong> I/O Mode)-ATA SEL(True IDE Mode)RDY/-BSY(PC <strong>Card</strong> Memory Mode)-IREQ(PC <strong>Card</strong> I/O Mode)INTRQ(True IDE Mode)-REG(PC <strong>Card</strong> Memory Mode)Attribute Memory Select-REG(PC <strong>Card</strong> I/O Mode)-DMACK1(True IDE Mode)RESET(PC <strong>Card</strong> Memory Mode)RESET(PC <strong>Card</strong> I/O Mode)-RESET(True IDE Mode)VCC(PC <strong>Card</strong> Memory Mode)VCC(PC <strong>Card</strong> I/O Mode)VCC(True IDE Mode)IIIOIIPWRThis signal is not used in this mode.This is an I/O Read strobe generated by the host. This signal gates I/O data onto thebus from the <strong>CompactFlash</strong> <strong>Card</strong> when the card is configured to use the I/O interface.In True IDE Mode, this signal has the same function as in PC <strong>Card</strong> I/O Mode.This signal is not used in this mode.The I/O Write strobe pulse is used to clock I/O data on the <strong>Card</strong> Data bus into the<strong>CompactFlash</strong> controller registers when the card is configured to use the I/O interface.The clocking will occur on the negative to positive edge of the signal (trailing edge).In True IDE Mode, this signal has the same function as in PC <strong>Card</strong> I/O Mode.This is an Output Enable strobe generated by the host interface. It is used to read datafrom the <strong>CompactFlash</strong> <strong>Card</strong> in Memory Mode and to read the CIS and configurationregisters.In PC <strong>Card</strong> I/O Mode, this signal is used to read the CIS and configuration registers.To enable True IDE Mode this input should be grounded by the host.In Memory Mode this signal is set high when the <strong>CompactFlash</strong> <strong>Card</strong> is ready to accepta new data transfer operation and held low when the card is busy. The Host memorycard socket must provide a pull-up resistor.At power up and at Reset, the RDY/-BSY signal is held low (busy) until the<strong>CompactFlash</strong> <strong>Card</strong> has completed its power up or reset function. No access of anytype should be made to the <strong>CompactFlash</strong> <strong>Card</strong> during this time. The RDY/-BSY signalis held high (disabled from being busy) whenever the following condition is true: The<strong>CompactFlash</strong> <strong>Card</strong> has been powered up with +RESET continuously disconnected orasserted.I/O Operation—After the <strong>CompactFlash</strong> <strong>Card</strong> has been configured for I/O operation,this signal is used as -Interrupt Request. This line is strobed low to generate a pulsemode interrupt or held low for a level mode interrupt.In True IDE Mode, this signal is the active high Interrupt Request to the host.This signal is used during Memory Cycles to distinguish between Common Memoryand Register (Attribute) Memory accesses. High for Common Memory, Low forAttribute Memory.The signal must also be active (low) during I/O Cycles when the I/O address is on theBus.This signal is used by the host in response to DMARQ to initiate DMA transfers.NOTE: This signal may be negated by the host to suspend the DMS transfer inprocess. For Multiword DMA transfers, the device may negate DMARQ with the tLspecified time once the -DMACK is asserted and reasserted again at a later time toresume DMA operation. Alternatively, if the device is able to continue the data transfer,the device may leave DMARQ asserted and wait for the host to reassert -DMACK.When the pin is high, this signal resets the <strong>CompactFlash</strong> <strong>Card</strong>. The card is Reset onlyat power up if this pin is left high or open from power-up. The card is also reset whenthe Soft Reset bit in the <strong>Card</strong> Configuration Option Register is set.This signal is the same as the PC <strong>Card</strong> Memory Mode signal.In the True IDE Mode this input pin is the active low hardware reset from the host.+5 V, +3.3 V power. This signal is the same for all modes.+5 V, +3.3 V power. This signal is the same for all modes.+5 V, +3.3 V power. This signal is the same for all modes.<strong>TRS</strong>* Tele-Radio-Space GmbH, reserves the right Page 19 from 113 <strong>Industrial</strong>-<strong>Grade</strong> <strong>CompactFlash</strong> <strong>Card</strong>to change products or specifications without notice. Rev. 1.4 Stand 06/2006

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