NoC design and optimization for Multi-core media processors

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CHAPTER 1. INTRODUCTION 9identification algorithms to identify contention free, bandwidth provisioned pathsin LS-NoC called pipes. The LS-NoC Manager has complete visibility of the stateof LS-NoC. Bandwidth requirements of the application are taken into account toprovision routes between communicating nodes by the flow identification algorithm.Flow based pipe establishment algorithm is topology independent and hence theNoC Manager supports applications mapped to both regular chip multiprocessors(CMPs) and customized SoCs with non-conventional NoC topologies. Additionally,fault tolerance is achieved by the NoC Manager by considering link status duringpipe establishment.• Design of a Label Switched Router: The Label Switched (LS) Router used in LS-NoC achieves single cycle traversal delay during no contention and is multicast andbroadcast capable. Source nodes in the LS-NoC can work asynchronously as cyclelevel scheduling is not required in the LS Router. LS router supports multiple clockdomain operation. Dual clock buffers can be used at output ports in the LS-NoCrouter. This eases clock domain crossovers and reduces the need for a single globallysynchronous clock. As a result, clock tree design is less complex and clock power ispotentially saved.1.6 Organization of the ThesisChapter 2 highlights several works from current literature related to the broad areasof QoS guaranteed NoCs, link microarchitecture, design space exploration of NoCs andeffects of communication on energy and performance trade-offs in CMPs.Chapter 3 presents a latency, power and performance trade-off study of NoCs throughlink microarchitecture exploration using microarchitectural and circuit level parameters.NoC exploration framework used in the trade-off studies is described. The interface tothe SystemC framework and sample output logs generater are presented in Appendix A.Effects of on-chip and off-chip communication due to various CMP tile configurationsis explored in Chapter 4. The need to use detailed interconnection network models to
CHAPTER 1. INTRODUCTION 10identify optimal energy and performance configurations is also highlighted. On-chip andoff-chipcommunicationeffectsonpowerandperformanceofaCMPsisexplored. Effectsofcommunication on program execution times and program execution energy are presented.Further, Energy-performance results for tile configurations and effects of custom L2 bankmapping and thread mapping on power and performance of CMPs is presented.Design and implementation of a label switching, traffic engineering capable NoC deliveringguaranteed QoS for streaming traffic in media processors has been presented inChapter 5. Traffic characteristics of streaming applications are also presented in the chapter.Functional verification of the LS-NoC router using various test cases is presented inAppendix B. Chapter 6 illustrates the LS-NoC management framework and the flowidentification algorithm used to establish pipes. An example of use of flow algorithm hasbeen presented in Appendix C. Streaming application test cases and various types ofvideo traffic are used to establish LS-NoC as a QoS guaranteeing framework in Chapter7. The thesis concludes in Chapter 8 after enlisting some future advancements possibleon the proposed work.
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Chapter 5Label Switched NoC - Motiv
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Chapter 6LS-NoC ManagementStreaming
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Chapter 8Conclusion and Future Work
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Appendix AInterface and Outputs of
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Appendix BTesting & Validation of L
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APPENDIX C. THE FLOW ALGORITHM 156X
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APPENDIX C. THE FLOW ALGORITHM 158E
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Bibliography[1] W.J. Dally and B. T
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BIBLIOGRAPHY 162[16] C. Hilton and
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BIBLIOGRAPHY 164[32] ErnoSalminen,T
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BIBLIOGRAPHY 166[50] Erno Salminen,
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BIBLIOGRAPHY 176[133] Ron Ho, Kenne
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NoC design and optimization for Multi-core media processors

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