Chapter 4 PA-RISC Computer Systems - OpenPA.net

Early PA-RISC Systems 865 and 870: PCX (CMOS)
HP 9000/860 (also HP 9000/860S) Cougar:
� 27.5 MHz NS-2 processor
� 1024 KB cache (separate I/D)
� 16384-entry TLB
� CTBs run at 9.16 MHz
� Maximum RAM of 128 MB with one memory controller (MC0) and 256 MB with two memory
controllers (MC0, MC1) [it could be the 256 MB/two MCs were only supported on the HP 3000
equivalents]
These systems are all based on the same I/O architecture and CIO devices and faciliate the same CPU
design — PA-RISC 1.0 NS-2. The 860 could be upgraded with newer CPU boards to a 865 or 870 (see
below).
4.2.4 865 and 870: PCX (CMOS)
The 9000/865 and the multi-processor 9000/870 (the first PA-RISC SMP system) include the first PA-
RISC processors implemented in CMOS — the PA-RISC 1.0 PCX. These systems are very similar to
the NS-2 based servers (with the 860 being board-upgradeable to a 865 or 870) and feature the same
principal system and I/O architecture (with a slightly modified CPU/SPU architecture). (See Note 6)
These system use the same 16 MB memory arrays as earlier servers but could additionally use 64 MB
boards.
HP 9000/865 Panther:
� 50 MHz PCX processor
� 768 KB cache (separate I/D)
� 8192-entry TLB
� CIO bus for I/O
� Maximum RAM of 512 MB
HP 9000/870 Panther (also HP 9000/870S):
� First (SMP) multiprocessor PA-RISC system
� Up to four 50 MHz PCX processors
� 870/100 was uni-processor, 870/200 dual, 870/300 tri and 870/400 quad
� 1024 KB cache (separate I/D)
� 8192-entry TLB
� CIO bus for I/O
� Performance of about 50 MIPS (single-CPU), 90 MIPS (dual-CPU)
� Maximum RAM of 1024 MB with two memory controllers (MC0, MC1) in 16 slots (16×64 MB)
[it could be the 1024 MB were only supported on the HP 3000 equivalents]
� Price of about US $440,000 for 870/300, $530,000 for 870/400
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