Chapter 4 PA-RISC Computer Systems - OpenPA.net

HP Integrity rx5670 Internals
4.43 HP Integrity rx5670
4.43.1 Overview
The rx5670 is a 7U rack-mountable SMP Itanium 2 server with up to four processors. Closely matching
the rx4640 system architecture, the rx5670 is based on HP’s zx1 Itanium chipset. PA-RISC L-Class
servers (built into the same system/chassis) could be upgraded by a “board-swap” — changing the main
system board, processors and support hardware — to Itanium 2 rx5670s (applies to HP rp5400/rp5450
(L1000/L2000) and HP rp5430/rp5470 (L1500/L3000)).
Time of introduction: 2002-2003, with prices at time of introduction between $23,000 (entry), $38,000
(average), $64,000 (large).
4.43.2 Internals
CPU
All caches are on-die (L1, L2 and L3).
Chipset
No. CPU Type Clock L1 (I/D) L2 (I/D) L3
1-4 Itanium 2 Madison 1.3 GHz 16/16 KB 256 KB 3.0 MB
1-4 Itanium 2 Madison 1.3 GHz 16/16 KB 256 KB 6.0 MB
The rx5670 is based on HP’s zx1 chipset, which consists of three main components — the MIO (memory
and I/O controller), the IOAs (I/O adapters) and the SMEs (scalable memory expanders):
� Pluto zx1 MIO (memory and I/O controller) is the main chipset controller and connects the three
central system buses:
1. Processor bus (6.4 GB/s at 200 MHz DDR)
2. Two independent memory buses (each 6.4 GB/s with six SMEs)
3. Eight I/O channels (aggregate 4.0 GB/s, via the IOAs, see below)
The zx1 MIO also contains both memory and cache controllers.
� Twelve zx1 SMEs (scalable memory expanders), six on each DIMM/memory carrier board, attach
to two independent zx1 memory buses (each 6.4 GB/s)
� Eight Mercury zx1 IOAs (I/O adapters) connect the PCI-X slots and I/O devices to the zx1 MIO
with an aggregate bandwidth of 4.0 GB/s on eight 0.5 GB/s channels
1. PCI-X 64/133 I/O slot on one channel — 0.5 GB/s
2. PCI-X 64/133 I/O slot on one channel — 0.5 GB/s
3. PCI-X 64/133 I/O slot on one channel — 0.5 GB/s
4. Two PCI-X 64/66 I/O slots on one channel — 0.5 GB/s
5. Two PCI-X 64/66 I/O slots on one channel — 0.5 GB/s
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