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Chapter 4 PA-RISC Computer Systems - OpenPA.net

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<strong>PA</strong>-<strong>RISC</strong> Processors Other <strong>PA</strong>-<strong>RISC</strong> processors<br />

� PROgress (<strong>PA</strong>-<strong>RISC</strong>) Newsletter - comp.sys.hp 43 Candace Doyle (October 1993: Precision Risc<br />

Organization. Accessed December 2007)<br />

� Winbond, Varian sign deal for thin-film IC process 44 Terho Uimonen (April 1994: Electronic<br />

News. Accessed January 2008 at findarticles.com)<br />

� <strong>PA</strong>-<strong>RISC</strong> in a PC box (was: Re: HP’s vision of a low-end 3000) - comp.sys.hp.mpe 45 Stan Sieler<br />

(Februar 1996. Accessed December 2007)<br />

Winbond W90210/215<br />

Shortly after the W89K embedded controllers Winbond introduced more sophisticated <strong>PA</strong>-<strong>RISC</strong> processors<br />

in Fall 1997 with the W90K line of embedded controllers. The W90210F still was 32-bit <strong>PA</strong>-<strong>RISC</strong><br />

1.1 but integrated many external I/O components on the chip — DRAM and DMA controllers, a PCI<br />

bridge and various I/O ports. As its predecessor, the W90210F was a level 0 <strong>PA</strong>-<strong>RISC</strong> 1.1 implementation<br />

without virtual addressing. It was apparently used in various “Inter<strong>net</strong> appliances” : set-top boxes,<br />

TV sets, DVD players, PDAs, VoIP devices, and for industrial automation. The W90215 is identical<br />

to the W90210 but did not include license rights for the embedded operating system (and was thus<br />

cheaper).<br />

� <strong>PA</strong>-<strong>RISC</strong> version 1.1 (third edition) 32-bit<br />

� Level 0 implementation (no virtual addressing): no MMU<br />

� Five-stage pipeline<br />

� One functional unit: one 32-bit integer ALU<br />

� L1 I cache: 4 KB, direct mapped, 32-byte blocks, 256 entries<br />

� L1 D cache: 8 KB, 2-way set-associative, 32-byte blocks, 2×64 entries, write-back<br />

� MAX-1 multimedia extensions (subword arithmetic) for multimedia applications, e.g., MPEG<br />

decoding<br />

� 80486 (Intel) bus interface<br />

� DRAM controller<br />

� ROM/FLASH interface<br />

� DMA controller (2-channel 8-bit)<br />

� PCI bridge<br />

� Two serial ports<br />

� Parallel port<br />

� 33 MHz and 66 MHz clock speeds (?)<br />

� 208-pin PQF package<br />

References<br />

43 http://groups.google.com/group/comp.sys.hp/msg/32de7bed6bae1c42<br />

44 http://findarticles.com/p/articles/mi_m0EKF/is_n2011_v40/ai_15334690<br />

45 http://groups.google.com/group/comp.sys.hp.mpe/msg/3a300f81ddfdf151<br />

38

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