01.02.2013 Views

Chapter 4 PA-RISC Computer Systems - OpenPA.net

Chapter 4 PA-RISC Computer Systems - OpenPA.net

Chapter 4 PA-RISC Computer Systems - OpenPA.net

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

HP Integrity rx2600 & rx2620 Internals<br />

4.40 HP Integrity rx2600 & rx2620<br />

4.40.1 Overview<br />

The rx2600 is the rack-designated sibling of the zx6000 workstation. They feature a very similar system<br />

design and casing and can be both mounted in 2U of a 19″ rack. Also based on one or two Itanium 2<br />

processors the rx2600 architecture differs from the zx6000 in that it is targeted for PCI-X I/O devices<br />

and thus does not feature the AGP port of the workstation-oriented zx6000.<br />

The rx2600 was later marketed as rx2600-2.<br />

Time of introduction: 2002-2003 (rx2600)/December 2004 (rx2620) with prices at the time starting at<br />

$7,300 (entry rx2600), $16,000 (average rx2600) to $33,000 (large rx2600).<br />

4.40.2 Internals<br />

CPU<br />

rx2600/rx2600-2<br />

rx2620<br />

No. CPU Type Clock L1 (I/D) L2 (I/D) L3<br />

1-2 Itanium 2 Deerfield?low-voltage 1.0 GHz 16/16 KB 256 KB 1.5 MB<br />

1-2 Itanium 2 Madison 1.3 GHz 16/16 KB 256 KB 3.0 MB<br />

1-2 Itanium 2 Madison 1.4 GHz 16/16 KB 256 KB 1.5 MB<br />

1-2 Itanium 2 Madison 1.5 GHz 16/16 KB 256 KB 6.0 MB<br />

No. CPU Type Clock L1 (I/D) L2 (I/D) L3<br />

1-2 Itanium 2 Madison? 1.3 GHz 16/16 KB 256 KB 3.0 MB<br />

1-2 Itanium 2 Madison? 1.6 GHz 16/16 KB 256 KB 3.0 MB<br />

1-2 Itanium 2 Montecitodual-core 1.4 GHz 16/16 KB 1024/256 KB 12 MB<br />

1-2 Itanium 2 Montecitodual-core 1.6 GHz 16/16 KB 1024/256 KB 18 MB<br />

All caches are on-die (L1, L2 and L3).<br />

Chipset<br />

The systems are based on HP’s zx1 chipset, which consists of two main components — the MIO (memory<br />

and I/O controller) and the IOAs (I/O adapters):<br />

� Pluto zx1 MIO (memory and I/O controller) is the main chipset controller and connects the three<br />

central system buses:<br />

1. Processor bus (6.4 GB/s at 200 MHz DDR)<br />

2. Two independent memory buses (each 4.25 GB/s)<br />

3. Eight I/O channels (aggregate 4.0 GB/s, via the IOAs, see below)<br />

The zx1 MIO also contains both memory and cache controllers.<br />

� Seven Mercury zx1 IOAs (I/O adapters) connect the PCI-X slots and I/O devices to the zx1 MIO<br />

with an aggregate bandwidth of 4.0 GB/s on eight 0.5 GB/s channels<br />

296

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!