ARM Compiler toolchain Using the Linker - ARM Information Center

Using scatter files
8.40 Type 3 image, two load regions and non-contiguous execution regions
Type 3 images consist of two load regions in load view and three execution regions in execution
view. They are similar to images of type 2 except that the single load region in type 2 is now
split into two load regions.
Relocate and split load regions using the following linker options:
--reloc The combination --reloc --split makes an image similar to simple type 3, but
the two load regions now have the RELOC attribute.
--ro_base=address1
--rw_base=address2
Specifies the load and execution address of the region containing the RO output
section.
Specifies the load and execution address for the region containing the RW output
section.
--split Splits the default single load region (that contains the RO and RW output
sections) into two load regions. One load region contains the RO output section
and one contains the RW output section.
The following example shows the scatter-loading description equivalent to using
--ro_base=0x010000 --rw_base=0x040000 --split:
Example 8-26 Multiple load regions
LR_1 0x010000 ; The first load region is at 0x010000.
{
ER_RO +0 ; The address is 0x010000.
{
* (+RO)
}
}
LR_2 0x040000 ; The second load region is at 0x040000.
{
ER_RW +0 ; The address is 0x040000.
{
* (+RW) ; All RW sections are placed consecutively into this region.
}
ER_ZI +0 ; The address is 0x040000 + size of ER_RW region.
{
* (+ZI) ; All ZI sections are placed consecutively into this region.
}
}
In this example:
• This description creates an image with two load regions, named LR_1 and LR_2, that have
load addresses 0x010000 and 0x040000.
• The image has three execution regions, named ER_RO, ER_RW and ER_ZI, that contain the RO,
RW, and ZI output sections respectively. The execution address of ER_RO is 0x010000.
• The ER_RW execution region is not contiguous with ER_RO, because its execution address is
0x040000.
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