ARM Compiler toolchain Using the Linker - ARM Information Center

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4.15 About ordering execution regions containing Thumb code 4.15.1 See also Image structure and generation The Thumb branch range is 4MB. When an execution region contains Thumb code that exceeds 4MB, armlink attempts to order sections that are at a similar average call depth and to place the most commonly called sections centrally. This helps to minimize the number of veneers generated. The Thumb-2 branch range is 16MB. Section re-ordering is only required if that limit is exceeded. To disable section re-ordering, use the --no_largeregions command-line option. Concepts • Section placement with the linker on page 4-19 • Overview of veneers on page 4-26. Reference Linker Reference: • --largeregions, --no_largeregions on page 2-92. ARM DUI 0474C Copyright © 2010-2011 ARM. All rights reserved. 4-25 ID080411 Non-Confidential
4.16 Overview of veneers 4.16.1 See also Image structure and generation Veneers are small sections of code generated by the linker and inserted into your program. The BL instruction is PC-relative and has a limited branch range. Therefore, armlink must generate veneers when a branch involves a destination beyond the branching range of the BL instruction. The range of a BL instruction is 32MB for ARM, 16MB for Thumb-2, and 4MB for Thumb. A veneer extends the range of the branch by becoming the intermediate target of the branch instruction. The veneer then sets the PC to the destination address. This enables the veneer to branch anywhere in the 4 GB address space. If ARM and Thumb are mixed, the veneer also handles processor state changes. The linker can generate the following veneer types depending on what is required: • inline veneers • short branch veneers • long branch veneers. armlink creates one input section called Veneer$$Code for each veneer. A veneer is generated only if no other existing veneer can satisfy the requirements. If two input sections contain a long branch to the same destination, only one veneer is generated that is shared by both branch instructions. A veneer is only shared in this way if it can be reached by both sections. If you are using ARMv4T, armlink generates veneers when a branch involves change of state between ARM and Thumb. You still get interworking veneers for ARMv5TE and later when using conditional branches, because there is no conditional BL instruction.Veneers for state changes are also required for B instructions in ARMv5 and later. Concepts • Veneer sharing on page 4-27 • Veneer types on page 4-28 • Generation of position independent to absolute veneers on page 4-29 • Reuse of veneers when scatter-loading on page 4-30. ARM DUI 0474C Copyright © 2010-2011 ARM. All rights reserved. 4-26 ID080411 Non-Confidential
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® ARM Copyright © 2010-2011 ARM.
Page 3 and 4: Contents ARM Compiler toolchain Usi
Page 5 and 6: Contents 7.15 Creating a symdefs fi
Page 7 and 8: Chapter 1 Conventions and feedback
Page 9 and 10: Chapter 2 Overview of the linker Th
Page 11 and 12: Concepts • Demand paging on page
Page 13 and 14: 2.3 Linker command-line options lis
Page 15 and 16: • --keep_protected_symbols on pag
Page 17 and 18: • --eager_load_debug, --no_eager_
Page 19 and 20: 2.5 What the linker outputs 2.5.1 S
Page 21 and 22: Chapter 3 Linking models supported
Page 23 and 24: 3.2 Bare-metal linking model 3.2.1
Page 25 and 26: Linking models supported by armlink
Page 27 and 28: 3.5.1 See also • There are restri
Page 29 and 30: 3.7 Concepts common to both BPABI a
Page 31 and 32: Image structure and generation •
Page 33 and 34: 4.1.1 See also Image structure and
Page 35 and 36: 4.3 Load view and execution view of
Page 37 and 38: 4.4 Methods of specifying an image
Page 39 and 40: 4.5 Types of simple image 4.5.1 See
Page 47 and 48: 4.10 About specifying an initial en
Page 49 and 50: 4.11.2 Example 4.11.3 See also The
Page 51 and 52: 4.13 Section alignment with the lin
Page 53: Reference Linker Reference: • --a
Page 57 and 58: 4.18 Veneer types 4.18.1 See also I
Page 59 and 60: 4.20 Reuse of veneers when scatter-
Page 61 and 62: 4.22 About weak references and defi
Page 63 and 64: BL init_foo ;Rest of code END 4.22.
Page 65 and 66: Image structure and generation 4.24
Page 67 and 68: 4.25 Specifying user libraries when
Page 69 and 70: 4.27 Use of the strict family of op
Page 71 and 72: 5.1 Elimination of common debug sec
Page 73 and 74: 5.3 Elimination of unused sections
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Page 77 and 78: • --scatter=file on page 2-142. C
Page 79 and 80: 5.6.1 See also Using linker optimiz
Page 81 and 82: 3. Creates the output image. 5.7.3
Page 83 and 84: 5.9 How the linker chooses a compre
Page 85 and 86: 5.11 How compression is applied 5.1
Page 87 and 88: 5.13 Inlining functions with the li
Page 89 and 90: Reference Assembler Reference: •
Page 91 and 92: 5.16 About reordering of tail calli
Page 93 and 94: 5.18 About merging comment sections
Page 95 and 96: 6.1 Linker options for getting info
Page 97 and 98: 6.3 Example of using the --info lin
Page 99 and 100: 6.4 How to find where a symbol is p
Page 101 and 102: • Load$$LR$$ load region symbols
Page 103 and 104: 7.2 Accessing linker-defined symbol
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7.4 Image$$ execution region symbol
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7.5.1 See also Accessing and managi
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7.7 Region name values when not sca
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7.9 Importing linker-defined symbol
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7.11 Section-related symbols 7.11.1
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7.13 Input section symbols 7.13.1 S
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7.15 Creating a symdefs file 7.15.1
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7.17 Reading a symdefs file 7.17.1
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7.18.2 See also 0x0000814D T __argv
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7.20 Specifying steering files on t
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7.22 Steering file format 7.22.1 Se
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7.24 Using $Super$$ and $Sub$$ to p
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Using scatter files • Images with
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8.2 When to use scatter-loading 8.2
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• --startup=symbol, --no_startup
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8.4.1 See also Concepts • About s
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8.5.1 See also } SRAM 0x8000 0x8000
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8.7 Specifying stack and heap using
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8.9 Creating root execution regions
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8.9.2 See also Tasks • Using the
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8.11 Placing functions and data at
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Using scatter files RAM 0x200000 (0
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Using scatter files • Using __at
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Developing Software for ARM ® Proc
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} } .ANY1(+RO) ; evenly distributed
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8.14 Examples of using placement al
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Using scatter files 8.15 Example of
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8.16 Examples of using sorting algo
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8.17 Selecting veneer input section
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Compiler Reference: • __attribute
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8.20 Restrictions on placing __at s
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8.21.1 See also Using scatter files
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8.23 Placing a key in flash memory
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8.25 Placement of sections with ove
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8.25.1 See also Using scatter files
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8.27 Example of placing code in a r
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8.29 Example of placing ARM C++ lib
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8.31 Reserving an empty region Usin
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8.32 About creating regions on page
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8.33 Overalignment of execution reg
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8.35 Expression evaluation in scatt
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8.37 Equivalent scatter-loading des
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Using scatter files Example 8-23 Po
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Using scatter files Example 8-25 Po
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Using scatter files • The ER_ZI e
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Using scatter files Example 8-29 Sc
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Chapter 9 GNU ld script support in
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9.2 Typical use cases for using ld
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Reference Linker Reference: • --l
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9.5 Recommendations for using ld sc
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.data : { __data_start = .; *(.data
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9.6.4 See also .got 0 : { *(.got.pl
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9.7.1 See also } .dynamic : { *(.dy
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9.8.1 See also { *(.bss .bss.*) . =
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Chapter 10 BPABI and SysV shared li
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BPABI and SysV shared libraries and
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10.3 Concepts common to all BPABI m
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10.5 Symbol visibility for BPABI mo
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10.6 Automatic import and export fo
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10.8 Symbol versioning for BPABI mo
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10.10 Linker options for SysV model
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10.13 Addressing modes in the SysV
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10.17 Linker options for bare metal
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10.21 Addressing modes in the BPABI
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10.23 About symbol versioning 10.23
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10.25 Example of creating versioned
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10.27 Linker options for enabling i
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Chapter 11 Features of the Base Pla
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Features of the Base Platform linki
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11.2 Example scatter file for the B
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Features of the Base Platform linki
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Change Topics affected Revisions fo
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