ARM Compiler toolchain Using the Linker - ARM Information Center

4.16 Overview of veneers
4.16.1 See also
Image structure and generation
Veneers are small sections of code generated by the linker and inserted into your program. The
BL instruction is PC-relative and has a limited branch range. Therefore, armlink must generate
veneers when a branch involves a destination beyond the branching range of the BL instruction.
The range of a BL instruction is 32MB for ARM, 16MB for Thumb-2, and 4MB for Thumb. A
veneer extends the range of the branch by becoming the intermediate target of the branch
instruction. The veneer then sets the PC to the destination address. This enables the veneer to
branch anywhere in the 4 GB address space. If ARM and Thumb are mixed, the veneer also
handles processor state changes.
The linker can generate the following veneer types depending on what is required:
• inline veneers
• short branch veneers
• long branch veneers.
armlink creates one input section called Veneer$$Code for each veneer. A veneer is generated
only if no other existing veneer can satisfy the requirements. If two input sections contain a long
branch to the same destination, only one veneer is generated that is shared by both branch
instructions. A veneer is only shared in this way if it can be reached by both sections.
If you are using ARMv4T, armlink generates veneers when a branch involves change of state
between ARM and Thumb. You still get interworking veneers for ARMv5TE and later when
using conditional branches, because there is no conditional BL instruction.Veneers for state
changes are also required for B instructions in ARMv5 and later.
Concepts
• Veneer sharing on page 4-27
• Veneer types on page 4-28
• Generation of position independent to absolute veneers on page 4-29
• Reuse of veneers when scatter-loading on page 4-30.
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