Hacking the Xbox

Appendix D - Getting Started with FPGAs 239
and interconnect. All of this wire is required to handle the many routing
permutations that you might require for single-bit wide applications.
In order to boost area efficiency, many FPGAs also include a few coarsegrain
primitives, such as chunks of RAM or a multiplier block. Xilinx’s
Virtex II-Pro FPGAs even include several PowerPC cores on-chip. While
this sounds impressive, the actual area consumed by such a core is
surprisingly small: A PowerPC processor probably consumes a little
more than 1mm 2 of silicon area, whereas the area of the FPGA is
hundreds of square millimeters.
The most recent FPGAs on the market have very flexible I/Os in
addition to having very flexible computational hardware. A typical
FPGA can interface to all of the most popular high-speed signaling
standards, including PCI, AGP, LVDS, HSTL, SSTL, and GTL. In
addition, most FPGAs can handle DDR clocked signals as well. In case
those acronyms didn’t mean anything to you, the basic idea is that an
FPGA can be used to talk to just about any piece of hardware you might
find on a typical PC motherboard, such as the Xbox. This is extremely
good news to hardware hackers, because it means that an FPGA can be
used to emulate or monitor almost any chip found in a PC. (Of course,
the PC may have to be down-clocked in cases where the FPGA cannot
keep up with the speed of the PC.)
Designing for an FPGA
You have a number of design entry options to choose from for a typical
FPGA design flow. If you prefer to think graphically, most design flows
support a schematic-capture tool. While schematic capture is often more
intuitive for hardware designs, they can be more difficult to maintain and
modify. For example, changing all instances of a net name can be tedious
if you have to click on every wire and type in the new name. Furthermore,
the size of any single level of design hierarchy is limited to the size
of a schematic sheet, so a complex design will require a good deal of
planning and forethought for just the schematic capture.
As a result, hardware description languages (HDLs) are the tool of
choice for implementing complex designs. HDLs look very similar at
first glance to normal programming languages. For example, the syntax
of Verilog looks very similar to that of C or Java. However, the semantics
of the language can be a bit of a challenge to understand.
Hardware has an inherent parallelism that procedural languages such as C
cannot express. If you think about it, every gate and every flip flop on an
FPGA can compute in parallel, whereas in a C program, a single thread
of execution is nominally assumed. As a result, HDLs represent hardware
as a collection of processes that operate in parallel; it is up to the
coder to group all of the functions into the correct processes so that the
compiler can understand how to turn a process into gates.