Hacking the Xbox

Appendix D - Getting Started with FPGAs 241
For example, a single clocked storage element (a flip-flop) in Verilog is a
“process” that typically has a structure similar to this:
input inData; // declare your inputs and outputs
input clock;
reg bitOfStorage; // declare the storage bit as a reg
type
always @(posedge clock) begin
bitOfStorage