Chapter 03 Power, Reset, and Clock Management.pdf

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Introduction to Power Managements www.ti.com
An initiator can generate bus transactions (read, write, etc.) toward targets. It is considered active when it
generates transactions. If it enters standby mode, it stops generating transactions. Because most initiators
also support a target port for configuration, they are both targets and initiators. Some examples of
initiators are processors, direct memory access (DMA), and memory management unit (MMU).
Target
A target is a passive module that can process bus transactions (read/write to memory-mapped registers).
It is considered active when its interface clocks and some or all of its functional clocks are available so it
can accept incoming transactions. A target can be put in idle mode by the PRCM module, and in this
mode, its interface clock can be gated at any time. An idle module can still receive its functional clocks
and generate interrupts and DMA requests. It can also generate asynchronous wake-up requests, if it is
wakeup-capable.
Active, Idle, and Standby Modes
The PRCM module handles automatic clock control differently for initiator and target modules.
For the initiator module, the following hardware handshake scheme is employed:
1. The initiator, when switching from active to idle mode, signals its status to the PRCM module.
2. The PRCM module cuts off the interface clock to the initiator module.
3. When the initiator module must reactivate, it signals the PRCM module, which reactivates its functional
and interface clocks.
For the target module, the following hardware handshake scheme is employed:
1. When the PRCM module confirms that the target module satisfies the idle conditions, it signals the
target module.
2. The target module acknowledges the idle request of the PRCM module, depending on its idle mode
internal settings (for details about idle mode settings, see the chapter in the technical reference manual
for the corresponding device module):
• If the module is set to smart-idle mode, it terminates its current operations, then acknowledges the
idle request to the PRCM module.
• If the module is set to force-idle mode, it acknowledges immediately, regardless of its state.
Because pending transfers, interrupts, and DMA requests can be lost, special software care must
be taken.
• If the module is set to no-idle mode, it does not acknowledge the idle request. This forces the
PRCM module to maintain the clock active.
3. The PRCM module cuts off the module clocks.
4. The target module can be awakened by the PRCM module when its wake-up conditions are satisfied
(wake-up event). It activates the module clocks, and then signals the wakeup.
5. The target module acknowledges the wake-up request.
6. Some target modules can support wake-up capability. They can explicitly request the PRCM module to
activate their clock.
This automatic clock control ensures reduced dynamic power consumption of the device without any
associated software overhead.
3.1.5 SmartReflex Voltage-Control Overview
SmartReflex is a power-management technique for controlling the operating voltage of a device to
reduce its active power consumption.
With SmartReflex, the power-supply voltage is adapted to the silicon performance statically (adapted to
the manufacturing process of a given device) or dynamically (adapted to the temperature-induced current
performance of the device). A comparison of predefined performance points to real-time on-chip measured
performance determines whether to raise or lower the power supply voltage.
SmartReflex achieves optimal performance/power trade-off for all devices across the technology process
spectrum and across temperature variations.
Figure 3-10 is a functional overview of the SmartReflex voltage-control architecture of the device
connected to an external power integrated circuit (IC).
234 Power, Reset, and Clock Management SPRUGN4L–May 2010–Revised June 2011
Copyright © 2010–2011, Texas Instruments Incorporated