Chapter 03 Power, Reset, and Clock Management.pdf

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Introduction to Power Managements www.ti.com
To minimize device power consumption, the modules are placed in power domains. All power domains
embed some logic and some memory. The memory contains a memory array powered by a dedicated
voltage rail (Varray + arrayon switch) and some logic powered by the same voltage rail as the power
domain logic (VDD + power on switch).
The memory area contains two entities:
• Memory bank: The memory bank is composed of memory arrays. It is powered by a dedicated voltage
rail and an associated power switch. The memory array within the memory bank may be of RTA
(retention-till-access) (see Section 3.5.2.1.4) or non-RTA type.
• Memory logic: The memory logic powered by the same voltage source as the logic area of the power
domain, but has its dedicated power switch.
NOTE: The behavior of the Varray, arrayon, and power on switches can be selected by software
(PWSTCTRL registers) hardwired; once the selection is made, the switches are handled
automatically by the PRCM module.
The power domain logic for the CORE and the PER power domains can be split between retention flip
flops (RFF) or nonretention flip flops (DFF). All other power domains embed only DFF.
A power domain can be in several power domain states: On, inactive, open/closed switch retention
(OSWR, CSWR), or off.
• On: Power on is set to 1; Vdd is provided to the logic (DFF and RFF) and to the memory logic. All the
logic is fully working. Depending on the software settings, Varray can keep its active value or be
lowered, and the arrayon switch can be open or closed (depending on the power domain, this can be
hardwired). As a consequence, the memory content can be accessible, retained, or lost.
• Inactive: The same as power on but all clocks are cut. Logic is not working, because no clock is
running.
• Closed-switch retention (CSWR): Power on is set to 1, Vdd is provided to the logic (DFF and RFF) and
to the memory logic, but Vdd can be lowered to its retention value. The logic is not functional, but is
retained. Depending on software settings, Varray can keep its active value (if needed by another
memory array in another power domain), or be lowered, and the arrayon switch can be open or closed
(depending on the power domain, this can be hardwired). As a consequence, the memory content can
be retained or lost.
• Open-switch retention (OSWR) (CORE and PER power domains only): Power on is set to 0, Vdd,
which can be lowered to its retention value, is provided only to the RFF logic. Only the RFF logic is
retained. The DFF logic is lost and reset on wakeup. Depending on software settings, Varray can keep
its active value (if needed by another memory array in another power domain), or be lowered, and the
arrayon switch can be open or closed (depending on the power domain, this can be hardwired). As a
consequence, the memory content can be retained or lost.
• Off: Power on is set to 0, Vdd is usually cut, all the logic (DFF and RFF) is lost, except for the context
that has been saved in the scratchpad memory of the WKUP power domain (always on). Varray can
keep its active value (if needed by another memory array sharing the same Varray voltage rail in
another power domain), be lowered (if all other memory arrays sharing the same Varray voltage rail
are set to be in retention), or be cut (0 V) when the entire device is in off mode. The arrayon switch is
open and the memory content is lost.
The retention state is useful for quickly switching to low-power idle mode without losing the context, and
then quickly switching back to active state when necessary. In retention state, power consumption is less
than in normal operating mode.
3.1.3.3 Voltage Domain
A voltage domain is a group of modules supplied by the same voltage regulator (embedded or external).
The power consumption of this group can be controlled by regulating its voltage independently.
Figure 3-7 shows the voltage domain.
230 Power, Reset, and Clock Management SPRUGN4L–May 2010–Revised June 2011
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