Single-Chip Low Power RF Transceiver for Narrowband Systems ...

CC1021
13. Transmitter .................................................................................................................. 44
13.1. FSK Modulation Formats ............................................................................... 44
13.2. Output Power Programming........................................................................... 44
13.3. TX Data Latency............................................................................................. 45
13.4. Reducing Spurious Emission and Modulation Bandwidth.............................. 46
14. Input / Output Matching and Filtering....................................................................... 46
15. Frequency Synthesizer .............................................................................................. 49
15.1. VCO, Charge Pump and PLL Loop Filter....................................................... 50
15.2. VCO and PLL Self-Calibration ....................................................................... 51
15.3. PLL Turn-on Time versus Loop Filter Bandwidth........................................... 52
15.4. PLL Lock Time versus Loop Filter Bandwidth................................................ 53
16. VCO and LNA Current Control .................................................................................. 53
17. Power Management .................................................................................................... 54
18. On-Off Keying (OOK).................................................................................................. 56
19. Crystal Oscillator ........................................................................................................ 58
20. Built-in Test Pattern Generator ................................................................................. 59
21. Interrupt on Pin DCLK ................................................................................................ 60
21.1. Interrupt upon PLL Lock................................................................................. 60
21.2. Interrupt upon Received Signal Carrier Sense .............................................. 60
22. PA_EN and LNA_EN Digital Output Pins ................................................................. 60
22.1. Interfacing an External LNA or PA ................................................................. 60
22.2. General Purpose Output Control Pins............................................................ 61
22.3. PA_EN and LNA_EN Pin Drive...................................................................... 61
23. System Considerations and Guidelines................................................................... 61
24. PCB Layout Recommendations ................................................................................ 63
25. Antenna Considerations ............................................................................................ 64
26. Configuration Registers............................................................................................. 64
26.1. CC1021 Register Overview............................................................................ 65
27. Package Description (QFN 32) .................................................................................. 85
27.1. Package Marking............................................................................................ 86
27.2. Recommended PCB Footprint for Package (QFN 32)................................... 87
27.3. Soldering Information ..................................................................................... 87
27.4. Plastic Tube Specification .............................................................................. 88
28. Ordering Information.................................................................................................. 88
29. General Information.................................................................................................... 89
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