Single-Chip Low Power RF Transceiver for Narrowband Systems ...

19. Crystal Oscillator
The recommended crystal frequency is
14.7456 MHz, but any crystal frequency in
the range 4 - 20 MHz can be used. Using
a crystal frequency different from 14.7456
MHz might in some applications give
degraded performance. Refer to
Application Note AN022 Crystal
Frequency Selection for more details on
the use of other crystal frequencies than
14.7456 MHz.
The crystal frequency is
used as reference for the data rate (as
well as other internal functions) and in the
4 – 20 MHz range the frequencies 4.9152,
7.3728, 9.8304, 12.2880, 14.7456,
17.2032, 19.6608 MHz will give accurate
data rates as shown in Table 17 and an IF
frequency of 307.2 kHz. The crystal
frequency will influence the programming
of the CLOCK_A, CLOCK_B and MODEM
registers.
An external clock signal or the internal
crystal oscillator can be used as main
frequency reference. An external clock
signal should be connected to XOSC_Q1,
while XOSC_Q2 should be left open. The
XOSC_BYPASS bit in the INTERFACE
register should be set to ‘1’ when an
external digital rail-to-rail clock signal is
used. No DC block should be used then. A
sine with smaller amplitude can also be
used. A DC blocking capacitor must then
be
used (10 nF) and the XOSC_BYPASS
bit in the INTERFACE
register should be
set to ‘0’. For input signal amplitude, see
section 4.5 on page 12.
Using the internal crystal oscillator, the
crystal must be connected between the
XOSC_Q1 and XOSC_Q2 pins. The
oscillator is designed for parallel mode
operation of the crystal. In addition,
loading
capacitors (C4 and C5) for the
crystal are required. The loading
capacitor
values depend on the total load
capacitance, CL, specified for the crystal.
The total load capacitance seen between
the crystal terminals should equal CL for
CC1021
the crystal to oscillate at the specified
frequency.
1
C L = + C
1 1
+
C C
XOSC_Q1 XOSC_Q2
C4
XTAL
4
5
parasitic
The parasitic capacitance is constituted by
pin input capacitance and PCB stray
capacitance. Total parasitic capacitance is
typically 8 pF. A trimming capacitor may
be placed across C5 for initial tuning if
necessary.
The crystal oscillator circuit is shown in
Figure 33. Typical component values for
different values of CL are given in Table
28.
The crystal oscillator is amplitude
regulated. This means that a high current
is required to initiate the oscillations. When
the amplitude builds up, the current is
reduced to what is necessary to maintain
approximately 600 mVpp amplitude. This
ensures a fast start-up, keeps the drive
level to a minimum and makes the
oscillator insensitive to ESR variations. As
long as the recommended load
capacitance
values are used,
the ESR is
not critical.
The
initial tolerance, temperature drift,
aging and load pulling should be carefully
specified in order to meet the required
frequency accuracy in a certain
application.
By specifying the total
®
expected frequency accuracy in SmartRF
Studio together with data rate
and
frequency separation, the software will
estimate
the total bandwidth and compare
to the available receiver channel filter
bandwidth. The software will report any
contradictions and a more accurate crystal
will be recommended if required.
C5
Figure 33. Crystal oscillator circuit
SWRS045B Page 58 of 89