Single-Chip Low Power RF Transceiver for Narrowband Systems ...
Single-Chip Low Power RF Transceiver for Narrowband Systems ...
Single-Chip Low Power RF Transceiver for Narrowband Systems ...
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CC1021<br />
PA_POWER Register (1Ch)<br />
REGISTER NAME Default<br />
value<br />
Active Description<br />
PA_POWER[7:4] PA_HIGH [3:0] 0 - Controls output power in high-power array<br />
0: High-power array is off<br />
1: Minimum high-power array output power<br />
…<br />
15: Maximum high-power array output power<br />
PA_POWER[3:0] PA_LOW[3:0] 15 - Controls output power in low-power array<br />
0: <strong>Low</strong>-power array is off<br />
1: Minimum low-power array output power<br />
…<br />
15: Maximum low-power array output power<br />
MATCH Register (1Dh)<br />
REGISTER NAME Default value Active Description<br />
It is more efficient in terms of current consumption to use<br />
either the lower or upper 4-bits in the PA_POWER<br />
register to control the power.<br />
MATCH[7:4] RX_MATCH[3:0] 0 - Selects matching capacitor array value <strong>for</strong> RX. Each<br />
step is approximately 0.4 pF.<br />
MATCH[3:0] TX_MATCH[3:0] 0 - Selects matching capacitor array value <strong>for</strong> TX.<br />
Each step is approximately 0.4 pF.<br />
PHASE_COMP Register (1Eh)<br />
REGISTER NAME Default<br />
value<br />
Active Description<br />
PHASE_COMP[7:0] PHASE_COMP[7:0] 0 - Signed compensation value <strong>for</strong> LO I/Q phase error.<br />
Used <strong>for</strong> image rejection calibration.<br />
−128: approx. −6.2° adjustment between I and Q phase<br />
−1: approx. −0.02° adjustment between I and Q phase<br />
0: approx. +0.02° adjustment between I and Q phase<br />
127: approx. +6.2° adjustment between I and Q phase<br />
GAIN_COMP Register (1Fh)<br />
REGISTER NAME Default<br />
value<br />
Active Description<br />
GAIN_COMP[7:0] GAIN_COMP[7:0] 0 - Signed compensation value <strong>for</strong> mixer I/Q gain error. Used<br />
<strong>for</strong> image rejection calibration.<br />
−128: approx. −1.16 dB adjustment between I and Q gain<br />
−1: approx. −0.004 dB adjustment between I and Q gain<br />
0: approx. +0.004 dB adjustment between I and Q gain<br />
127: approx. +1.16 dB adjustment between I and Q gain<br />
POWERDOWN Register (20h)<br />
REGISTER NAME Default<br />
value<br />
Active Description<br />
POWERDOWN[7] PA_PD 0 H Sets PA in power-down when PD_MODE[1:0]=2<br />
POWERDOWN[6] VCO_PD 0 H Sets VCO in power-down when PD_MODE[1:0]=2<br />
POWERDOWN[5] BUFF_PD 0 H Sets VCO divider, LO buffers and prescaler in power-down<br />
when PD_MODE[1:0]=2<br />
POWERDOWN[4] CHP_PD 0 H Sets charge pump in power-down when PD_MODE[1:0]=2<br />
POWERDOWN[3] LNAMIX_PD 0 H Sets LNA/mixer in power-down when PD_MODE[1:0]=2<br />
POWERDOWN[2] VGA_PD 0 H Sets VGA in power-down when PD_MODE[1:0]=2<br />
POWERDOWN[1] FILTER_PD 0 H Sets image filter in power-down when PD_MODE[1:0]=2<br />
POWERDOWN[0] ADC_PD 0 H Sets ADC in power-down when PD_MODE[1:0]=2<br />
SWRS045B Page 80 of 89