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Single-Chip Low Power RF Transceiver for Narrowband Systems ...

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9.2. Signal Interface<br />

The CC1021 can be used with NRZ (Non-<br />

Return-to-Zero) data or Manchester (also<br />

known as bi-phase-level) encoded data.<br />

CC1021 can also synchronize the data from<br />

the demodulator and provide the data<br />

clock at DCLK. The data <strong>for</strong>mat is<br />

controlled by the DATA_FORMAT[1:0] bits<br />

in the MODEM register.<br />

CC1021 can be configured <strong>for</strong> three<br />

different data <strong>for</strong>mats:<br />

Synchronous NRZ mode<br />

In transmit mode CC1021 provides the data<br />

clock at DCLK and DIO is used as data<br />

input. Data is clocked into CC1021 at the<br />

rising edge of DCLK. The data is<br />

modulated at <strong>RF</strong> without encoding.<br />

In receive mode CC1021 per<strong>for</strong>ms the<br />

synchronization and provides received<br />

data clock at DCLK and data at DIO. The<br />

data should be clocked into the interfacing<br />

circuit at the rising edge of DCLK. See<br />

Figure 9.<br />

Synchronous Manchester encoded<br />

mode<br />

In transmit mode CC1021 provides the data<br />

clock at DCLK and DIO is used as data<br />

input. Data is clocked into CC1021 at the<br />

rising edge of DCLK and should be in NRZ<br />

<strong>for</strong>mat. The data is modulated at <strong>RF</strong> with<br />

Manchester code. The encoding is done<br />

by CC1021. In this mode the effective bit<br />

rate is half the baud rate due to the<br />

coding. As an example, 19.2 kBaud<br />

Manchester encoded data corresponds to<br />

9.6 kbps.<br />

In receive mode CC102 per<strong>for</strong>ms the<br />

synchronization and provides received<br />

data clock at DCLK and data at DIO.<br />

CC1021 per<strong>for</strong>ms the decoding and NRZ<br />

data is presented at DIO. The data should<br />

be clocked into the interfacing circuit at the<br />

rising edge of DCLK. See Figure 10.<br />

In synchronous NRZ or Manchester mode<br />

the DCLK signal runs continuously both in<br />

RX and TX unless the DCLK signal is<br />

gated with the carrier sense signal or the<br />

PLL lock signal. Refer to section 21 <strong>for</strong><br />

more details.<br />

CC1021<br />

If SEP_DI_DO = 0 in the INTE<strong>RF</strong>ACE<br />

register, the DIO pin is the data output in<br />

receive mode and data input in transmit<br />

mode.<br />

As an option, the data output can be made<br />

available at a separate pin. This is done<br />

by setting SEP_DI_DO = 1 in the<br />

INTE<strong>RF</strong>ACE register. Then, the LOCK pin<br />

will be used as data output in synchronous<br />

mode, overriding other use of the LOCK<br />

pin.<br />

Transparent Asynchronous UART<br />

mode<br />

In transmit mode DIO is used as data<br />

input. The data is modulated at <strong>RF</strong> without<br />

synchronization or encoding.<br />

In receive mode the raw data signal from<br />

the demodulator is sent to the output<br />

(DIO). No synchronization or decoding of<br />

the signal is done in CC1021 and should be<br />

done by the interfacing circuit.<br />

If SEP_DI_DO = 0 in the INTE<strong>RF</strong>ACE<br />

register, the DIO pin is the data output in<br />

receive mode and data input in transmit<br />

mode. The DCLK pin is not active and can<br />

be set to a high or low level by<br />

DATA_FORMAT[0].<br />

If SEP_DI_DO = 1 in the INTE<strong>RF</strong>ACE<br />

register, the DCLK pin is the data output in<br />

receive mode and the DIO pin is the data<br />

input in transmit mode. In TX mode the<br />

DCLK pin is not active and can be set to a<br />

high or low level by DATA_FORMAT[0].<br />

See Figure 11.<br />

Manchester encoding and decoding<br />

In the Synchronous Manchester encoded<br />

mode CC1021 uses Manchester coding<br />

when modulating the data. The CC1021<br />

also per<strong>for</strong>ms the data decoding and<br />

synchronization. The Manchester code is<br />

based on transitions; a “0” is encoded as a<br />

low-to-high transition, a “1” is encoded as<br />

a high-to-low transition. See Figure 12.<br />

The Manchester code ensures that the<br />

signal has a constant DC component,<br />

which is necessary in some FSK<br />

demodulators. Using this mode also<br />

ensures compatibility with CC400/CC900<br />

designs.<br />

SWRS045B Page 25 of 89

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