Single-Chip Low Power RF Transceiver for Narrowband Systems ...

4.6. Frequency Synthesizer Section
Parameter
Phase noise, 402 – 470 MHz
Phase noise, 804 – 940 MHz
PLL loop filter bandwidth
Loop filter 2, up to 19.2 kBaud
Loop filter 3, up to 38.4 kBaud
PLL lock time (RX / TX turn time)
Loop filter 2, up to 19.2 kBaud
Loop filter 3, up to 38.4 kBaud
Loop filter 5, up to 153.6 kBaud
PLL turn-on time. From power down
mode with crystal oscillator running.
Loop filter 2, up to 19.2 kBaud
Loop filter 3, up to 38.4 kBaud
Loop filter 5, up to 153.6 kBaud
CC1021
Min Typ Max Unit Condition / Note
-79
-80
-87
-100
-105
-73
-74
-81
-94
-111
15
30.5
140
75
14
1300
1080
700
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
kHz
kHz
Table 8. Frequency synthesizer parameters
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us
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Unmodulated carrier
At 12.5 kHz offset from carrier
At 25 kHz offset from carrier
At 50 kHz offset from carrier
At 100 kHz offset from carrier
At 1 MHz offset from carrier
Measured using loop filter
components given in Table 13.
The phase noise will be higher for
larger PLL loop filter bandwidth.
Unmodulated carrier
At 12.5 kHz offset from carrier
At 25 kHz offset from carrier
At 50 kHz offset from carrier
At 100 kHz offset from carrier
At 1 MHz offset from carrier
Measured using loop filter
components given in Table 13.
The phase noise will be higher for
larger PLL loop filter bandwidth.
After PLL and VCO calibration.
The PLL loop bandwidth is
programmable.
See Table 25 on page 52 for loop
filter component values.
307.2 kHz frequency step to RF
frequency within ±10 kHz, ±15
kHz, ±50 kHz settling accuracy
for loop filter 2, 3 and 5
respectively. Depends on loop
filter component values and
PLL_BW register setting. See
Table 26 on page 53 for more
details.
Time from writing to registers to
RF frequency within ±10 kHz, ±15
kHz, ±50 kHz settling accuracy
for loop filter 2, 3 and 5
respectively. Depends on loop
filter component values and
PLL_BW register setting. See
Table 25 on page 53 for more
details.
SWRS045B Page 13 of 89