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Chapter 11. openETCS Simulation
Activating_override
Switching_to_Unfitted
Similar to the Mode switch from Unfitted to Staff Responsible in
Figure 11.13, the override function is also used here to switch Staff
Responsible using the “c37” oModeGuard in Figure 10.21. Thus,
the corresponding input field “Select Override Function” in the DMI
is set to true.
The switch to the ETCS Mode Staff Responsible is propagated to all
state machines by the global signal bOverrideSelected = TRUE.
11.4. Code Generation
The simulation model of UML state machines introduced in Section 11.3 cannot be directly
executed. Therefore, compilable code must be generated (Figure 11.2) or rather a model-to-text
transformation must be applied. The RT-Tester application was chosen as generator because its
ORA-SIM [72] component provides a complete generator for C to build executable simulations
from UML models. Alternatively, custom code generators could have be implemented for the
UML state machines. Though, as already discussed in Section 3.4, complete tool development is
not in the main focus of this work and using already available solutions is preferred. Furthermore,
the RT-Tester application already provides an infrastructure for evaluating test results.
Since the RT-Tester is currently not available under a OSS or FLOSS license, the generation
process cannot be published, like other parts of the case study, as FLOSS within this document.
Nevertheless, this restriction is not applicable for the generated source code, which can be
found in Section H.4.
The generated source code must be linked against libraries provided by RT-Tester, which
neither are publicly available. Therefore, the simulation source code cannot be currently
compiled and executed without a valid RT-Tester license. Nevertheless, the generated source
code is used as reference in this work.
11.5. Simulation Execution Results
The simulation execution generates two types of logs or rather traces:
1. output of the state machines
2. output of the RT-Tester
The output of the state machines is produced by the printf() statements in the actions of
states and can be found accordingly in the simulation model. It reflects the simulated, virtual
track for the train and the expected ETCS Mode switches of the EVC. Errors cannot be found
directly in this trace, only the activation of the State “Isolated” of the CEVC machine in
Figure 11.12 refers to a successful execution.
The RT-Tester produces for each state machine or rather abstract machine a separated log
file. This holds the information about the executed asserts and the test result. Thus, this type
is not very qualified for comprehending the virtual track but for the identification of errors or
the successful execution of the simulation. Each log file contains at its very end a summary
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