Open Core Protocol Debug Interface Specification rev 1.0 - OCP-IP

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running. Thus the output is driven LOW, and the tri-state is controlled by the NOT DBGACK
signal.
B.3.4 EMUx Trigger Action – Bi-directional Cross-triggering
Bi-directional cross-triggering is selected on the emulation pins EMU0 and EMU1 by writing a
‘0011’ to the TCR TriggerXControl bits. The following conditions hold true when this trigger
control functionality is enabled:
The EMU0 input shall operate independent of the EMU0 output
The EMU1 input shall operate independent of the EMU1 output
If a High to Low transition is seen on the EMUx pins, the EMUDBGREQx signal shall be
asserted high. The detection of a high to low transition on the EMUx pin is an asynchronous
event.
A low level on the EMUx input pin shall not cause a debug request.
The assertion of EMUDBGREQx shall be inhibited for 1 clock cycle each time the DBGACK
signal transitions from the high-to-low state. A high-to-low state transition on the DBGACK
signal is an indication that the CPU is about to go out of debug state and start running. This
must be done to prevent self-triggering.
A debug event such as a user halt or a breakpoint shall drive the EMUx pins LOW.
The EMU pin shall be driven low for 32 clock cycles and then return high.
Clearing the input synchronizers on a high to low transition of DBGACK will prevent
retriggering from debug events that were registered on a previous halt.
B.3.5 EMUx Trigger Action – Notify Interconnect Error
The EMU0 and EMU1 trigger control can be used to notify the environment outside the chip
that an application error has occurred on the L3/L4 interconnect. This function is selected by
writing a ‘0100’ to the TriggerXControl field. The following conditions hold true when this
trigger control function is enabled:
The notification of Interconnect Error shall happen only at run-time when DBGACK is LOW.
The application error flag [Serror_App] reports both Application errors and not attributable
errors
When the triggers are configured as “interconnect” and the SuppressInterconnIntr bit in the
Debug Control and Status Register is set, then a non-attributable interconnect error, reported
through an application error flag (Serror App) occurring while DBGACK is high, will not be
reflected on the EMUx lines
The change in state on the EMUx pins may be used at the system level to either stop another
CPU or start a trace.
B.3.6 EMUx Trigger Action – Generate EMUINT Interrupt
The EMU0 and EMU1 trigger control can be used to generate an interrupt on the target. This
function is selected by writing a ‘0101’ to the respective TriggerXControl field. The following
conditions hold true when this trigger control function is enabled:
This function will effectively result in the generation of an interrupt to the CPU.
If EMU0 is driven LOW it will result in the generation of GNEMUINT0, which will in turn
generate the IC_EMUINTR.
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