SBC81870 SERIES USER'S MANUAL VERSION A1 SEPTEMBER ...

SBC81870 Intel ® Pentium ® M w/ DDR/VGA/Dual LANDRAM DATA INTEGRITY MODE:Select Parity or ECC (error-correcting code), according to thetype of installed DRAM.SYSTEM BIOS CACHEABLE:Selecting Enabled allows caching of the system BIOS ROM atF0000h-FFFFFh, resulting in better system performance.However, if any program writes to this memory area, a systemerror may result.VIDEO BIOS CACHEABLE:Select Enabled allows caching of the video BIOS, resulting inbetter system performance. However, if any program writes tothis memory area, a system error may result.MEMORY HOLE AT 15M-16M:You can reserve this area of system memory for ISA adapterROM. When this area is reserved, it cannot be cached. Theuser information of peripherals that need to use this area ofsystem memory usually discusses their memory requirements.DELAYED TRANSACTION:The chipset has an embedded 32-bit posted write buffer tosupport delay transactions cycles. Select Enabled to supportcompliance with PCI specification version 2.1.AGP APERTURE SIZE:This field determines the effective size of the GraphicAperture used for a particular GMCH configuration. It can beupdated by the GMCH-specific BIOS configuration sequencebefore the PCI standard bus enumeration sequence takesplace. If it is not updated then a default value will select anaperture of maximum size.Award BIOS Setup 63