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64 Light Sensors
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Although this requires multiplexer logic, it
is just for one bit and therefore only
requires nine slices.
Each sensor still requires its own logic.
This is partly to synchronize the input
signals, but is also required to ensure that
each “beam broken” pulse is only used to
record a count value once. For this reason,
the one slice per sensor is unlikely to
be reduced.
When you see that the logic size is
increasing because the function is becoming
more parallel, it is worth looking to see
if anything else can be time-shared and
moved into memory. In this case, we can
indeed improve things.
We can replace the multiplexer with a
64-bit parallel-to-serial converter (32
slices), which converts the parallel domain
into a serial sequential process, as demonstrated
in Figure 10. To detect only the
start of a new pulse, a memory is used to
Original 2-D Design
XC2S50
332 CLB
0 Block RAM
4 x SRL16E = 64 delays
Figure 10 – 64-bit parallel-to-serial converter replaces multiplexer.
remember the last state of each of the 64
sensors. Because the operation is so predictable,
we can use the SRL16E memory
mode, which requires just two slices.
Dramatic Cost Reduction
So was it worth it? I think the diagrams in
Figure 11 speak for themselves.
To reduce the function from 332 CLBs
to just 22 CLBs is a dramatic change: 15
times smaller. Our design now fits in the
smallest Spartan-II device (XC2S15) – and
actually only uses 25% of that.
This reduction in size and cost is not
just specific to this particular design. For
example, much of 3G wireless processing is
involved with “chip rates” of 1.2288 MHz
and 3.84 MHz. This provides the time to
allow the performance and memory of
Virtex devices to process at least 32 channels
sequentially, in just the same way as
our simple fruit counter.
XC2S15
22 CLB
1 Block RAM
Sequential 3-D Design
Figure 11 – 3-D design yields compelling results.
64 Cycles
Increment
Control
Final Considerations
The Spartan-II XC2S15 has only 86 user
I/Os, and our design has high I/O
demands. Having used 64 for sensor
inputs and applied a clock, only 21 I/Os
are left for the microcontroller interface.
Given an 8-bit data bus, it is possible to
connect to the microcontroller, but it
does illustrate how I/O can limit a design
once these highly efficient techniques are
employed.
Of course, it would be a pity for 75% of
the XC2S15 to be completely wasted. It
would be nice to embed the microcontroller
and the UART in the same device.
This is also possible, but it’s a topic for
another article.
Meanwhile, once you discover that 3-D
designs are possible, you are well on your
way to improving the profit margins on
your own designs.
[Editor’s note: This article was derived
from a two-part TechXclusive on the
support.xilinx.com website. To see the
original TechXclusive, go to
support.xilinx.com/support/
techxclusives/3-D-techX22.htm and
support.xilinx.com/support/
techxclusives/3-D2-techX23.htm.
To see more TechXclusives,
go to support.xilinx.com and search for
“TechXclusives,” then click on “Xilinx
TechXclusives Home.” ]
Fall 2003 Xcell Journal 29