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Discover New Applications For Low-Cost Solutions Discover ... - Xilinx

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XILINX IP REFERENCE GUIDE<br />

Function<br />

Vendor Name IP Type<br />

Discrete Cosine Transform, 2D Inverse CAST, Inc. AllianceCORE V-II V-E V S-II<br />

Discrete Cosine Transform, Combined 2D <strong>For</strong>ward/Inverse CAST, Inc. AllianceCORE V-II V-E V S-II<br />

Discrete Cosine Transform, <strong>For</strong>ward 2D CAST, Inc. AllianceCORE V-II V-E V S-II<br />

Discrete Cosine Transform, <strong>For</strong>ward/Inverse Telecom Italia Lab S.p.A. AllianceCORE V S-II<br />

Discrete Cosine Transform, forward/inverse 2D Barco-Silex AllianceCORE V-II V-E V S-II<br />

Discrete Wavelet Transform, Combined 2D <strong>For</strong>ward/Inverse CAST, Inc. AllianceCORE V-II V-E V S-II<br />

Discrete Wavelet Transform, Line-based programmable forward CAST, Inc. AllianceCORE V-II V-E V S-II<br />

Huffman Decoder CAST, Inc. AllianceCORE V-II V-E V S-IIE S-II<br />

JPEG Fast Codec CAST, Inc. AllianceCORE V-IIP V-II V-E V S-3<br />

JPEG Fast Codec CAST, Inc. Submitted V-IIP V-II V-E V S-3<br />

JPEG Fast Decoder CAST, Inc. AllianceCORE V-IIP V-II V-E V S-IIE<br />

JPEG Fast Encoder CAST, Inc. AllianceCORE V-IIP V-II V-E V<br />

JPEG, 2000 Encoder CAST, Inc. AllianceCORE V-IIP V-II V-E<br />

JPEG, Fast color image decoder Barco-Silex AllianceCORE V-II V-E V<br />

JPEG, Fast gray scale image decoder Barco-Silex AllianceCORE V-II V-E V<br />

JPEG, Motion Codec core V1.0 Amphion Semiconductor Ltd. AllianceCORE V-II V-E V<br />

JPEG, Motion Decoder core V1.0 Amphion Semiconductor Ltd. AllianceCORE V-II V-E V<br />

JPEG, Motion Encoder core V2.0 Amphion Semiconductor Ltd. AllianceCORE V-II V-E V<br />

Longitudinal Time Code Generator Deltatec S.A. AllianceCORE V<br />

MPEG-2 HDTV I & P Encoder Duma Video, Inc. AllianceCORE V-II<br />

MPEG-2 SDTV I & P Encoder Duma Video, Inc. AllianceCORE V-II<br />

NTSC-COSEP Pinpoint <strong>Solutions</strong>, Inc. AllianceCORE V-II V-E S-3 S-IIE<br />

Backplanes and Gigabit Serial I/O<br />

Aurora 401: single lane, 32-bit interface <strong>Xilinx</strong> Reference Design V-IIP<br />

WP160: Emulating External SERDES Devices with<br />

Embedded RocketIO Transceivers <strong>Xilinx</strong> White Paper V-IIP<br />

XAPP 649: SONET Rate Conversion in Virtex-II Pro Devices <strong>Xilinx</strong> Reference Design V-IIP<br />

XAPP 651: SONET and OTN Scramblers/Descramblers <strong>Xilinx</strong> Reference Design V-IIP<br />

XAPP 652: Word Alignment and SONET/SDH Framing <strong>Xilinx</strong> Reference Design V-IIP<br />

XAPP660: Partial Reconfiguration of RocketIO Attributes<br />

using PPC405 core (DCR Bus) <strong>Xilinx</strong> Reference Design V-IIP<br />

XAPP661: RocketIO Transceiver Bit-Error Rate Tester (BERT) <strong>Xilinx</strong> Reference Design V-IIP<br />

XAPP662: Partial Reconfig. of RocketIO Attributes using PPC405 core<br />

(PLB or OPB bus) + RocketIO Transceiver Bit-Error Rate Tester (BERT) <strong>Xilinx</strong> Reference Design V-IIP<br />

Basic Elements<br />

Binary Counter <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

Binary Decoder <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

Bit Bus Gate <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

Bit Gate <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

Bit Multiplexer <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

BUFE-based Multiplexer Slice <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

BUFT-based Multiplexer Slice <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

Bus Gate <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

Bus Multiplexer <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

Comparator <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

FD-based Parallel Register <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

FD-based Shift Register <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

Four-Input MUX <strong>Xilinx</strong> LogiCORE S<br />

LD-based Parallel Latch <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

Parallel-to-Serial Converter <strong>Xilinx</strong> LogiCORE S<br />

RAM-based Shift Register <strong>Xilinx</strong> LogiCORE V-IIP V-II V-E V S-3 S-IIE S-II<br />

Register <strong>Xilinx</strong> LogiCORE S<br />

Three-Input MUX <strong>Xilinx</strong> LogiCORE S<br />

Two-Input MUX <strong>Xilinx</strong> LogiCORE S<br />

Prototype & Development Hardware Products<br />

CPU + FPGA (Virtex/Spartan-II) MicroEngine Cards Intrinsyc, Inc. AllianceCORE<br />

CPU + FPGA (Virtex-II) MicroEngine Cards Intrinsyc, Inc. AllianceCORE V-II<br />

JockoBoard SOC Virtex-II Prototyping Platform RealFast Operating Systems AB AllianceCORE V-II<br />

LogiCRAFT Evaluation System Xylon d.o.o. AllianceCORE V-E S-II<br />

PC/104-Plus Reconfigurable Module Board Derivation Systems, Inc. AllianceCORE<br />

uPCI Reference and Development Platform Intrinsyc, Inc. AllianceCORE<br />

XTENSA Microprocessor Emulation Kit Tensilica, Inc. AllianceCORE V-II<br />

Visit the <strong>Xilinx</strong> IP Center for more details at www.xilinx.com/ipcenter<br />

Fall 2003 Xcell Journal 97<br />

Virtex-II Pro<br />

Virtex-II<br />

Virtex-E<br />

Virtex<br />

Spartan-3<br />

Spartan-IIE<br />

Spartan-II<br />

Spartan

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