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VS1033 - MP3/AAC/WMA/MIDI AUDIO CODEC - VLSI Solution

VS1033 - MP3/AAC/WMA/MIDI AUDIO CODEC - VLSI Solution

VS1033 - MP3/AAC/WMA/MIDI AUDIO CODEC - VLSI Solution

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<strong>VLSI</strong><strong>Solution</strong> y<strong>VS1033</strong>c<strong>VS1033</strong>C8. FUNCTIONAL DESCRIPTION8.7.5 SCI DECODE TIME (RW)When decoding correct data, current decoded time is shown in this register in full seconds.The user may change the value of this register. In that case the new value should be written twice.SCI DECODE TIME is reset at every software reset and also when WAV (PCM or IMA ADPCM), <strong>AAC</strong>,<strong>WMA</strong>, or <strong>MIDI</strong> decoding starts or ends.8.7.6 SCI AUDATA (RW)When decoding correct data, the current sample rate and number of channels can be found in bits 15:1and 0 of SCI AUDATA, respectively. Bits 15:1 contain the sample rate divided by two, and bit 0 is 0 formono data and 1 for stereo. Writing to SCI AUDATA will change the sample rate directly.Example: 44100 Hz stereo data reads as 0xAC45 (44101).Example: 11025 Hz mono data reads as 0x2B10 (11024).Example: Writing 0xAC80 sets sample rate to 44160 Hz, stereo mode does not change.To reduce the digital power consumption when in idle, you can write a low samplerate to SCI AUDATA,and also write 0 to SCI CLOCKF to turn off the PLL.8.7.7 SCI WRAM (RW)SCI WRAM is used to upload application programs and data to instruction and data RAMs. The startaddress must be initialized by writing to SCI WRAMADDR prior to the first write/read of SCI WRAM.As 16 bits of data can be transferred with one SCI WRAM write/read, and the instruction word is 32 bitslong, two consecutive writes/reads are needed for each instruction word. The byte order is big-endian (i.e.most significant words first). After each full-word write/read, the internal pointer is autoincremented.8.7.8 SCI WRAMADDR (W)SCI WRAMADDR is used to set the program address for following SCI WRAM writes/reads. Addressoffset of 0 is used for X, 0x4000 for Y, and 0x8000 for instruction memory. Peripheral registers can alsobe accessed.SM WRAMADDR Dest. addr. Bits/ DescriptionStart. . . End Start. . . End Word0x1800. . . 0x187F 0x1800. . . 0x187F 16 X data RAM0x5800. . . 0x587F 0x1800. . . 0x187F 16 Y data RAM0x8030. . . 0x84FF 0x0030. . . 0x04FF 32 Instruction RAM0xC000. . . 0xFFFF 0xC000. . . 0xFFFF 16 I/OOnly user areas in X, Y, and instruction memory are listed above. Other areas can be accessed, but shouldnot be written to unless otherwise specified.Version 1.00, 2008-02-01 40

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