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SD Specifications Part 1 UHS-II Simplified Addendum - SD Association

SD Specifications Part 1 UHS-II Simplified Addendum - SD Association

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<strong>UHS</strong>-<strong>II</strong> <strong>Simplified</strong> <strong>Addendum</strong> Version 1.01©Copyright 2010-2013 <strong>SD</strong> Card <strong>Association</strong>4. Physical Layer SpecificationThe details of <strong>UHS</strong>-<strong>II</strong> Physical layer such as signaling architecture electrical specification and handle bitor symbol encoding and decoding are described in this chapter.The <strong>UHS</strong>-<strong>II</strong> standard is targeted for mobile, portable applications and home applications. It shall becompatible to legacy <strong>SD</strong> Cards. It provides enhanced data rate, while maintaining low power and lowEMI. It is recommended for short cable length, typically below 20cm.This <strong>UHS</strong>-<strong>II</strong> specification is defined for Card and also for Embedded Device. In this specification,"Device" means both Card and Embedded Device. If some specification items or descriptions are onlyfor Card, "Card" is used. If some specification items or descriptions are only for Embedded Device,"Embedded Device" is used.The key features of Physical Layer are defined as follows:• Differential low voltage Signaling with DC coupling• Flexibility of transmission rates• Low Frequency Reference Clock (RCLK)• Two types of duplex mode: FD mode (mandatory), 2L-HD mode (optional)• Additional pins for High-Speed Differential transmission• 8b/10b coding• Enhanced power saving modes4.1 Physical Layer OverviewPhysical layer consists of the following functions:• Differential Transmitter(Tx) and Receiver(Rx)• CLK phase adjustment and Data recovery• Serializer and De-serializer (SERDES)• 8b/10b encoding and 10b/8b decoding• Amplitude Detection• Synthesizer for Reference CLKPhysical8b10b Enc / Dec, SERDESCLK Phase Adjust & Data RecoveryTransmitter (Tx) / Receiver (Rx)Loopback modeSynthesizer for Ref. CLKTx-Rx Switch(in 2L-HD mode)Amplitude DetectorFigure 4-1: Physical Layer Overview4.2 Physical Layer Interface ArchitectureFigure 4-2 illustrates an example of the interface architecture of physical layer in case of point to pointconnection between Host and Card. The <strong>UHS</strong>-<strong>II</strong> interface utilizes transmission Lines (including socketand pins) and terminations which are meant to keep the impedance matching for high speedtransmission. <strong>UHS</strong>-<strong>II</strong> interface introduces the additional pins for high speed data transmission.<strong>UHS</strong>-<strong>II</strong> interface has continuous variable data rate from 39MB/sec to 156MB/sec as effective data rate.Device shall cover the whole range.14

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