SD Specifications Part 1 UHS-II Simplified Addendum - SD Association

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UHS-II Simplified Addendum Version 1.01©Copyright 2010-2013 SD Card AssociationOffsetByte address0000h:0007h0008h:000Fh0010h:0017h0018h:001Fh0020h:0027h0028h:002Fh0030h:0037h0038h:00FFh0100h:0107h0108h:03FFhIOADR000h:001h (63)002h:003h (63)004h:005h (63)006h:007h008h:009h (63)00Ah:00Bh (63)00Ch:00Dh (63)00Eh:03Fh040h:041h (63)042h:0FFhRegisterGeneric Capabilities RegisterPHY Capabilities RegisterLINK/TRAN Capabilities RegisterReserved for Capabilities RegisterTable 6-6 : CFG_REG MapGeneric Settings RegisterPHY Settings RegisterLINK/TRAN Settings RegisterReservedPreset RegisterReserved(00)(00)(00)(00)(00)(00)(00)6.2.9.2 CFG_REG DescriptionThe details of CFG_REG fields are described below. Refer to Appendix D for the details of registers,and in addition, refer to Table D- 1 for the description of "Attrib" in this specification.It is recommended for Host to use INQUIRY_CONFIG (whose initial values are set to Host'scapabilities) and SET_COMMON_CONFIG regardless of topology (P2P or Ring). Refer to Section6.2.8.3 for the details of INQUIRY_CONFIG and SET_COMMON_CONFIG. For each Capabilitiesregister, the operation is defined when receiving INQUIRY_CONFIG. Note that no operations take placeto the Capabilities field whose "Attrib" is Rsvd when receiving INQUIRY_CONFIG.The followings are Device behavior when written to the register whose "Attrib" is RO or HwInit. P2P CCMD Write: Device shall issue RES with NACK=0 and bit value of such register is notchanged. Broadcast CCMD Write: Device shall forward broadcast CCMD to the next node, and bit valuesuch register is not changed.A part of Section 6.2.9.2 is a blank in the Simplified Addendum.64
UHS-II Simplified Addendum Version 1.01©Copyright 2010-2013 SD Card Association6.2.9.2.1 Generic Capabilities RegisterThe table shown below describes Generic Capabilities Register.Location Attrib Register Field Name and Explanation CMDcategory63-24 Rsvd -- Broadcast23-16 RO Application TypeThis field indicates a type of Application.Bit 16: 0 = Non-SD memory, 1 = SD MemoryBit 17: 0 = Non-SDIO, 1 = SDIOBit 18: 0 = Card, 1 = EmbeddedOthers = reservedNo operations take place when receiving INQUIRY_CONFIG./P2P15 Rsvd --14 RO DADR LengthThis field indicates the length of DADR.0b = 4 bytes1b = Reserved for the future useNo operations take place when receiving INQUIRY_CONFIG.(See Note (1)).13-08 RO Device-specific Number of Lanes and FunctionalityThis field indicates capabilities of number of Lanes and 2L-HDmode. As Device shall support FD mode, the following table showsthe optional capabilities. If functionality mentioned below isavailable, the corresponding bit is set to 1, and otherwise 0.Device can indicate pluralities of options.Bit Location Mode D0 D1 D2 D308 2L-HD Bi Bi NA NA09 2D1U-FD Dn Up Dn NA10 1D2U-FD Dn Up NA Up11 2D2U-FD Dn Up Dn Up12, 13 Reserved - - - -Legends:Bi = Lane is bidirectionalDn = Lane is fixed to downstreamUp = Lane is fixed to upstreamNA = Not availableRefer to Chapter 8 and 9 for more details.No operations take place when receiving INQUIRY_CONFIG.07-00 Rsvd --Note:(1) Host which handles 4 bytes address cannot access to the Device whose DADR Length is other than 0b.Table 6-7 : Generic Capabilities Register65
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SD Specifications Part 1 UHS-II Simplified Addendum - SD Association

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