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SD Specifications Part 1 UHS-II Simplified Addendum - SD Association

SD Specifications Part 1 UHS-II Simplified Addendum - SD Association

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<strong>UHS</strong>-<strong>II</strong> <strong>Simplified</strong> <strong>Addendum</strong> Version 1.01©Copyright 2010-2013 <strong>SD</strong> Card <strong>Association</strong>6.2.11 Interrupt Register (INT_REG)Interrupt can be operated through INT_REG. INT_REG can be accessed by CCMD, not DCMD.If the application is <strong>SD</strong>-memory, it is not necessary to implement INT_REG.6.2.11.1 Register MapTable 6-17 shows the map of INT_REG. Offset means the relative address based on INT_BASE.OffsetByte address0000h:0003h0004h:0007h0008h:01FFhIOADR000h:000h (31)001h:001h (31)002h:07FhRegisterINT EnableINT StatusReservedTable 6-17 : Interrupt Register(00)(00)6.2.11.2 INT_REG DescriptionThe details of INT_REG fields are described below. Refer to Table D- 1 for the description of "Attrib" inthis specification.6.2.11.2.1 INT EnableThe table shown below describes INT Enable Register. Up to eight kinds of interrupt factors (fromFactor#0 to Factor#7) can be defined in <strong>UHS</strong>-<strong>II</strong>. In this specification, all interrupt factors are not definedand reserved for the future specifications.Location Attrib Register Field Name and Explanation31-08 Rsvd07-00 RW INT EnableThis field indicates enables of each interrupt factors. Location X (0 ≤ X ≤ 7)corresponds to the enable bit for Factor#X.0b = Interrupt disable1b = Interrupt enableTable 6-18 : INT Enable Register6.2.11.2.2 INT StatusThe table shown below describes INT Status Register. Up to eight kinds of interrupt factors (fromFactor#0 to Factor#7) can be defined in <strong>UHS</strong>-<strong>II</strong>. In this specification, all interrupt factors are not definedand reserved for the future specifications.74

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