Xilinx UG230 Spartan-3E FPGA Starter Kit Board User Guide
Xilinx UG230 Spartan-3E FPGA Starter Kit Board User Guide
Xilinx UG230 Spartan-3E FPGA Starter Kit Board User Guide
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R<br />
Chapter 11<br />
Intel StrataFlash Parallel NOR Flash<br />
PROM<br />
As shown in Figure 11-1, the <strong>Spartan</strong> ® -<strong>3E</strong> <strong>FPGA</strong> <strong>Starter</strong> <strong>Kit</strong> boards includes a 128 Mbit (16<br />
Mbyte) Intel StrataFlash parallel NOR Flash PROM. As indicated, some of the StrataFlash<br />
connections are shared with other components on the board.<br />
<strong>Spartan</strong>-<strong>3E</strong> <strong>FPGA</strong><br />
CE2<br />
CE1<br />
LDC0<br />
SF_CE0<br />
CE0<br />
LDC1<br />
SF_OE<br />
OE#<br />
HDC<br />
SF_WE<br />
WE#<br />
LDC2<br />
SF_BYTE<br />
BYTE#<br />
<strong>User</strong> I/O<br />
SF_STS<br />
STS<br />
<strong>User</strong> I/O<br />
SF_D<br />
D[15:12]<br />
<strong>User</strong> I/O<br />
SF_D<br />
D[11:8]<br />
D[7:1]<br />
SF_D<br />
D[7:1]<br />
D[0]<br />
SPI_MISO<br />
D[0]<br />
<strong>User</strong> I/O<br />
SF_A<br />
A[24:20]<br />
A[19:0]<br />
SF_A<br />
A[19:0]<br />
A[23:20]<br />
CoolRunner-II CPLD<br />
Intel StrataFlash<br />
Character LCD<br />
DB[7:4]<br />
SPI Serial Flash<br />
Figure 11-1: Connections to Intel StrataFlash Flash Memory<br />
The StrataFlash PROM provides various functions:<br />
Stores a single <strong>FPGA</strong> configuration in the StrataFlash device.<br />
Stores two different <strong>FPGA</strong> configurations in the StrataFlash device and dynamically<br />
switch between the two using the <strong>Spartan</strong>-<strong>3E</strong> <strong>FPGA</strong>’s MultiBoot feature.<br />
Stores and executes MicroBlaze processor code directly from the StrataFlash device.<br />
<strong>Spartan</strong>-<strong>3E</strong> <strong>FPGA</strong> <strong>Starter</strong> <strong>Kit</strong> <strong>Board</strong> <strong>User</strong> <strong>Guide</strong> www.xilinx.com 83<br />
<strong>UG230</strong> (v1.2) January 20, 2011<br />
[7:4]<br />
ADC<br />
DAC<br />
Q<br />
SDO<br />
SDO<br />
Platform Flash<br />
D0<br />
<strong>UG230</strong>_c11_01_030206