Embedded Systems Design with the Atmel AVR Microcontroller Part II

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250 CHAPTER 8. SYSTEM LEVEL DESIGN while(!(UCSR1A & 0x20)); UDR1= data; //Sets the value in ADCH to the //value in the USART Data Register } //************************************************************************* unsigned char USART_RX_ch1(void) { unsigned char rx_data; //Checks to see if receive is complete while(!(UCSR1A & 0x80)); rx_data=UDR1; // Returns data return rx_data; } //************************************************************************* //int_timer0_ovf_interrupt(): The Timer0 overflow interrupt is being //employed as a time base for a master timer for this project. The ceramic //resonator operating at 10 MHz is divided by 256. The 8-bit Timer0 //register (TCNT0) overflows every 256 counts or every 6.55 ms. //************************************************************************* void init_timer0_ovf_interrupt(void) { TCCR0B = 0x04; //divide timer0 timebase by 256, overflow occurs every 6.55ms TIMSK0 = 0x01; //enable timer0 overflow interrupt asm("SEI"); //enable global interrupt } //************************************************************************* //timer0_interrupt_isr: //Note: Timer overflow 0 is cleared by hardware when executing the //corresponding interrupt handling vector. //************************************************************************* void timer0_interrupt_isr(void)
8.3. MOTOR SPEED CONTROL 251 { input_delay++; //input delay processing } //************************************************************************* //delay(unsigned int num_of_6_55ms_interrupts): This generic delay function //provides the specified delay as the number of 6.55 ms "clock ticks" from //the Timer0 interrupt. //Note: This function is only valid when using a 10 MHz crystal or ceramic // resonator //************************************************************************* void delay(unsigned int number_of_6_55ms_interrupts) { TCNT0 = 0x00; //reset timer0 input_delay = 0; while(input_delay
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Embedded Systems Design with the At
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iv An Introduction to Logic Circuit
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Copyright © 2010 by Morgan & Clayp
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ABSTRACT This textbook provides pra
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x CONTENTS 7 6.9.3 Input Capture Mo
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xii CONTENTS A 8.5.3 Circuit diagra
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Preface In 2006 Morgan & Claypool P
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Page 173: Author’s Biography STEVEN F. BARR
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