Embedded Systems Design with the Atmel AVR Microcontroller Part II

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282 APPENDIX B. ATMEGA164 HEADER FILE #define COM2A0 6 #define COM2B1 5 #define COM2B0 4 #define WGM21 1 #define WGM20 0 /* 2-wire SI */ #define TWBR (*(volatile unsigned char *)0xB8) #define TWSR (*(volatile unsigned char *)0xB9) #define TWPS1 1 #define TWPS0 0 #define TWAR (*(volatile unsigned char *)0xBA) #define TWGCE 0 #define TWDR (*(volatile unsigned char *)0xBB) #define TWCR (*(volatile unsigned char *)0xBC) #define TWINT 7 #define TWEA 6 #define TWSTA 5 #define TWSTO 4 #define TWWC 3 #define TWEN 2 #define TWIE 0 #define TWAMR (*(volatile unsigned char *)0xBD) /* USART0 */ #define UBRR0H (*(volatile unsigned char *)0xC5) #define UBRR0L (*(volatile unsigned char *)0xC4) #define UBRR0 (*(volatile unsigned int *)0xC4) #define UCSR0C (*(volatile unsigned char *)0xC2) #define UMSEL01 7 #define UMSEL00 6 #define UPM01 5 #define UPM00 4 #define USBS0 3 #define UCSZ01 2 #define UCSZ00 1 #define UCPOL0 0 #define UCSR0B (*(volatile unsigned char *)0xC1) #define RXCIE0 7
#define TXCIE0 6 #define UDRIE0 5 #define RXEN0 4 #define TXEN0 3 #define UCSZ02 2 #define RXB80 1 #define TXB80 0 #define UCSR0A (*(volatile unsigned char *)0xC0) #define RXC0 7 #define TXC0 6 #define UDRE0 5 #define FE0 4 #define DOR0 3 #define UPE0 2 #define U2X0 1 #define MPCM0 0 #define UDR0 (*(volatile unsigned char *)0xC6) /* USART1 */ #define UBRR1H (*(volatile unsigned char *)0xCD) #define UBRR1L (*(volatile unsigned char *)0xCC) #define UBRR1 (*(volatile unsigned int *)0xCC) #define UCSR1C (*(volatile unsigned char *)0xCA) #define UMSEL11 7 #define UMSEL10 6 #define UPM11 5 #define UPM10 4 #define USBS1 3 #define UCSZ11 2 #define UCSZ10 1 #define UCPOL1 0 #define UCSR1B (*(volatile unsigned char *)0xC9) #define RXCIE1 7 #define TXCIE1 6 #define UDRIE1 5 #define RXEN1 4 #define TXEN1 3 #define UCSZ12 2 #define RXB81 1 283
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Embedded Systems Design with the At
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iv An Introduction to Logic Circuit
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Copyright © 2010 by Morgan & Clayp
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ABSTRACT This textbook provides pra
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x CONTENTS 7 6.9.3 Input Capture Mo
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xii CONTENTS A 8.5.3 Circuit diagra
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Preface In 2006 Morgan & Claypool P
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138 CHAPTER 6. TIMING SUBSYSTEM x(t
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162 CHAPTER 6. TIMING SUBSYSTEM Ope
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182 CHAPTER 7. ATMEL AVR OPERATING
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Page 173: Author’s Biography STEVEN F. BARR
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